From a6a5a20faf3d1146c61016a4739790abe1173e20 Mon Sep 17 00:00:00 2001 From: dj Date: Fri, 20 Jan 2006 00:38:42 +0000 Subject: [PATCH] * config/m32c/m32c.h (REG_ALLOC_ORDER): Define. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@110003 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 4 ++++ gcc/config/m32c/m32c.h | 7 +++++++ 2 files changed, 11 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ff5462f26a7..b434a9cd568 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2006-01-19 DJ Delorie + + * config/m32c/m32c.h (REG_ALLOC_ORDER): Define. + 2006-01-19 Paul Brook * gcc/config/arm/arm.c (arm_compute_func_type): Treat all functions diff --git a/gcc/config/m32c/m32c.h b/gcc/config/m32c/m32c.h index 98400a0096b..b9eb223092e 100644 --- a/gcc/config/m32c/m32c.h +++ b/gcc/config/m32c/m32c.h @@ -218,6 +218,13 @@ machine_function; #endif #define PC_REGNUM PC_REGNO +/* Order of Allocation of Registers */ + +#define REG_ALLOC_ORDER { \ + 0, 1, 2, 3, 4, 5, /* r0..r3, a0, a1 */ \ + 12, 13, 14, 15, 16, 17, 18, /* mem0..mem7 */ \ + 6, 7, 8, 9, 10, 11 /* sb, fb, sp, pc, flg, ap */ } + /* How Values Fit in Registers */ #define HARD_REGNO_NREGS(R,M) m32c_hard_regno_nregs (R, M) -- 2.11.4.GIT