From 9e1f8220981068c96da74f033a09e975f46c8ce6 Mon Sep 17 00:00:00 2001 From: kelvin Date: Thu, 22 Mar 2018 15:42:39 +0000 Subject: [PATCH] gcc/ChangeLog: 2018-03-22 Kelvin Nilsen PR target/84760 * doc/extend.texi: Add four new prototypes for vec_ld. * config/rs6000/rs6000-builtin.def (LVX_V1TI): Reorder symbol definitions for more logical presentation. * config/rs6000/rs6000-c.c: (altivec_overloaded_builtins): Add entries for V1TI variants of __builtin_altivec_ld builtin. * config/rs6000/rs6000.c: (altivec_expand_lv_builtin): Add test and handling of V1TI variant of LVX icode pattern. (altivec_expand_builtin): Add case for ALTIVEC_BUILTIN_LVX_V1TI. (rs6000_gimple_fold_builtin): Likewise. (altivec_init_builtins): Add code to define __builtin_altivec_lvx_v1ti function. gcc/testsuite/ChangeLog: 2018-03-22 Kelvin Nilsen PR target/84760 * gcc.target/powerpc/altivec-ld-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@258774 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 15 ++++++ gcc/config/rs6000/rs6000-builtin.def | 2 +- gcc/config/rs6000/rs6000-c.c | 9 ++++ gcc/config/rs6000/rs6000.c | 13 ++++- gcc/doc/extend.texi | 4 ++ gcc/testsuite/ChangeLog | 5 ++ gcc/testsuite/gcc.target/powerpc/altivec-ld-1.c | 67 +++++++++++++++++++++++++ 7 files changed, 113 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/altivec-ld-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5a748b6aac6..01f109a6f5d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2018-03-22 Kelvin Nilsen + + PR target/84760 + * doc/extend.texi: Add four new prototypes for vec_ld. + * config/rs6000/rs6000-builtin.def (LVX_V1TI): Reorder symbol + definitions for more logical presentation. + * config/rs6000/rs6000-c.c: (altivec_overloaded_builtins): Add + entries for V1TI variants of __builtin_altivec_ld builtin. + * config/rs6000/rs6000.c: (altivec_expand_lv_builtin): Add test and + handling of V1TI variant of LVX icode pattern. + (altivec_expand_builtin): Add case for ALTIVEC_BUILTIN_LVX_V1TI. + (rs6000_gimple_fold_builtin): Likewise. + (altivec_init_builtins): Add code to define + __builtin_altivec_lvx_v1ti function. + 2018-03-22 Jakub Jelinek PR inline-asm/84941 diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 44c86de8b1b..4bc52cc25d9 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -1241,8 +1241,8 @@ BU_ALTIVEC_X (LVXL_V4SI, "lvxl_v4si", MEM) BU_ALTIVEC_X (LVXL_V8HI, "lvxl_v8hi", MEM) BU_ALTIVEC_X (LVXL_V16QI, "lvxl_v16qi", MEM) BU_ALTIVEC_X (LVX, "lvx", MEM) -BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", MEM) BU_ALTIVEC_X (LVX_V1TI, "lvx_v1ti", MEM) +BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", MEM) BU_ALTIVEC_X (LVX_V2DI, "lvx_v2di", MEM) BU_ALTIVEC_X (LVX_V4SF, "lvx_v4sf", MEM) BU_ALTIVEC_X (LVX_V4SI, "lvx_v4si", MEM) diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index 7fcb334724b..ff6d05f93c0 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -1562,6 +1562,15 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_UNS_FLOATO_V2DI, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, + { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, + RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_V1TI, 0 }, + { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, + RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V1TI, 0 }, + { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, + RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 }, + { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V1TI, + RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 }, + { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 2b8a6bec268..f736ab26f1f 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -14451,7 +14451,8 @@ altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk) /* For LVX, express the RTL accurately by ANDing the address with -16. LVXL and LVE*X expand to use UNSPECs to hide their special behavior, so the raw address is fine. */ - if (icode == CODE_FOR_altivec_lvx_v2df + if (icode == CODE_FOR_altivec_lvx_v1ti + || icode == CODE_FOR_altivec_lvx_v2df || icode == CODE_FOR_altivec_lvx_v2di || icode == CODE_FOR_altivec_lvx_v4sf || icode == CODE_FOR_altivec_lvx_v4si @@ -15805,6 +15806,9 @@ altivec_expand_builtin (tree exp, rtx target, bool *expandedp) case ALTIVEC_BUILTIN_LVXL_V16QI: return altivec_expand_lv_builtin (CODE_FOR_altivec_lvxl_v16qi, exp, target, false); + case ALTIVEC_BUILTIN_LVX_V1TI: + return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v1ti, + exp, target, false); case ALTIVEC_BUILTIN_LVX_V2DF: return altivec_expand_lv_builtin (CODE_FOR_altivec_lvx_v2df, exp, target, false); @@ -16542,6 +16546,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) case ALTIVEC_BUILTIN_LVX_V4SF: case ALTIVEC_BUILTIN_LVX_V2DI: case ALTIVEC_BUILTIN_LVX_V2DF: + case ALTIVEC_BUILTIN_LVX_V1TI: { arg0 = gimple_call_arg (stmt, 0); // offset arg1 = gimple_call_arg (stmt, 1); // address @@ -17443,6 +17448,10 @@ altivec_init_builtins (void) = build_function_type_list (V2DI_type_node, long_integer_type_node, pcvoid_type_node, NULL_TREE); + tree v1ti_ftype_long_pcvoid + = build_function_type_list (V1TI_type_node, + long_integer_type_node, pcvoid_type_node, + NULL_TREE); tree void_ftype_opaque_long_pvoid = build_function_type_list (void_type_node, @@ -17538,6 +17547,8 @@ altivec_init_builtins (void) def_builtin ("__builtin_altivec_lvxl_v16qi", v16qi_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVXL_V16QI); def_builtin ("__builtin_altivec_lvx", v4si_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVX); + def_builtin ("__builtin_altivec_lvx_v1ti", v1ti_ftype_long_pcvoid, + ALTIVEC_BUILTIN_LVX_V1TI); def_builtin ("__builtin_altivec_lvx_v2df", v2df_ftype_long_pcvoid, ALTIVEC_BUILTIN_LVX_V2DF); def_builtin ("__builtin_altivec_lvx_v2di", v2di_ftype_long_pcvoid, diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 98d06f7a17f..93a0ebc97f1 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -18397,6 +18397,10 @@ vector double vec_div (vector double, vector double); vector long vec_div (vector long, vector long); vector unsigned long vec_div (vector unsigned long, vector unsigned long); vector double vec_floor (vector double); +vector __int128 vec_ld (int, const vector __int128 *); +vector unsigned __int128 vec_ld (int, const vector unsigned __int128 *); +vector __int128 vec_ld (int, const __int128 *); +vector unsigned __int128 vec_ld (int, const unsigned __int128 *); vector double vec_ld (int, const vector double *); vector double vec_ld (int, const double *); vector double vec_ldl (int, const vector double *); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dc6a9bce15e..737afb1f996 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-03-22 Kelvin Nilsen + + PR target/84760 + * gcc.target/powerpc/altivec-ld-1.c: New test. + 2018-03-22 Bin Cheng * gcc.dg/graphite/pr83126.c: Require pthread for the test. diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-ld-1.c b/gcc/testsuite/gcc.target/powerpc/altivec-ld-1.c new file mode 100644 index 00000000000..d70f90cedcd --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/altivec-ld-1.c @@ -0,0 +1,67 @@ +/* { dg-do run { target powerpc*-*-* } } */ +/* { dg-require-effective-target vmx_hw } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-maltivec -O0 -Wall -Wno-deprecated" } */ + +#include +#include + +static __vector __int128 v; +static __vector __int128 *pv; + +static __vector unsigned __int128 uv; +static __vector unsigned __int128 *puv; + +static __int128 i128; +static __int128 *pi128; + +static unsigned __int128 u128; +static unsigned __int128 *pu128; + + +void +doInitialization () +{ + v[0] = -1; + pv = &v; + + uv[0] = 0xcafebabe; + puv = &uv; + + i128 = 0xfabeabe; + pi128 = &i128; + + u128 = 0xabefabe; + pu128 = &u128; +} + +int +main (int argc, char *argv[]) +{ + __vector __int128 loaded_v; + __vector unsigned __int128 loaded_uv; + + /* Usage: + * result = vec_ld (int index, __vector v) + * is equivalent to: + * result = v [index]; + */ + doInitialization (); + loaded_v = vec_ld (0, pv); + if (loaded_v[0] != -1) + abort (); + + loaded_uv = vec_ld (0, puv); + if (loaded_uv[0] != 0xcafebabe) + abort (); + + loaded_v = vec_ld (0, pi128); + if (loaded_v[0] != 0xfabeabe) + abort (); + + loaded_uv = vec_ld (0, pu128); + if (loaded_uv[0] != 0xabefabe) + abort (); + + return 0; +} -- 2.11.4.GIT