From 9c5e20fe20c2362791bb54d22142379218a48e47 Mon Sep 17 00:00:00 2001 From: jsm28 Date: Wed, 23 Nov 2016 23:34:05 +0000 Subject: [PATCH] Fix e500 offset handling for TImode. Given my previous fix for a missing insn pattern for e500, building glibc runs into an assembler error "Error: operand out of range (256 is not between 0 and 248)". This comes from an insn: (insn 115 1209 1210 (set (reg:DF 27 27 [orig:294 _129 ] [294]) (subreg:DF (mem/c:TI (plus:SI (reg/f:SI 1 1) (const_int 256 [0x100])) [14 %sfp+256 S16 A128]) 0)) 1909 {*frob_df_ti} (nil)) This patch adjusts the offset handling for TImode - and TDmode and PTImode in case such subregs can arise for them - to be the same as for TFmode, so that proper SPE offset checks are made in the TARGET_E500_DOUBLE case. This allows the glibc build to complete. Testing shows 372 FAILs across the gcc, g++ and libstdc++ testsuites; more cleanup is certainly needed, but this gets to the point where the toolchain at least builds so it's possible to compare test results when fixing bugs. * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For TARGET_E500_DOUBLE. handle TDmode, TImode and PTImode the same as TFmode, IFmode and KFmode. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@242814 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/rs6000.c | 7 +++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 27e032df6d9..ca575bc0e23 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2016-11-23 Joseph Myers + * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For + TARGET_E500_DOUBLE. handle TDmode, TImode and PTImode the same as + TFmode, IFmode and KFmode. + +2016-11-23 Joseph Myers + * config/rs6000/spe.md (*frob__ti_8): New insn pattern. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index fa62e2e50ea..7cf71e6caa6 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -8443,14 +8443,13 @@ rs6000_legitimate_offset_address_p (machine_mode mode, rtx x, case TFmode: case IFmode: case KFmode: + case TDmode: + case TImode: + case PTImode: if (TARGET_E500_DOUBLE) return (SPE_CONST_OFFSET_OK (offset) && SPE_CONST_OFFSET_OK (offset + 8)); - /* fall through */ - case TDmode: - case TImode: - case PTImode: extra = 8; if (!worst_case) break; -- 2.11.4.GIT