From 8c5d1d13882a0e58c308b95b1b51484721eafded Mon Sep 17 00:00:00 2001 From: Juzhe-Zhong Date: Mon, 18 Dec 2023 17:49:08 +0800 Subject: [PATCH] RISC-V: Enable vect test for RV32 gcc/testsuite/ChangeLog: * lib/target-supports.exp: Add RV32. --- gcc/testsuite/lib/target-supports.exp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index bd38d72562d..370df10978d 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -11569,13 +11569,14 @@ proc check_vect_support_and_set_flags { } { } } elseif [istarget amdgcn-*-*] { set dg-do-what-default run - } elseif [istarget riscv64-*-*] { + } elseif [istarget riscv*-*-*] { if [check_effective_target_riscv_v] { lappend DEFAULT_VECTCFLAGS "--param" "riscv-vector-abi" set dg-do-what-default run } else { - lappend DEFAULT_VECTCFLAGS "-march=rv64gcv_zvfh" "-mabi=lp64d" - lappend DEFAULT_VECTCFLAGS "--param" "riscv-autovec-preference=scalable" + foreach item [add_options_for_riscv_v ""] { + lappend DEFAULT_VECTCFLAGS $item + } lappend DEFAULT_VECTCFLAGS "--param" "riscv-vector-abi" set dg-do-what-default compile } -- 2.11.4.GIT