From 81dc7ba63633722faa6543af7359d0ca9a9854f7 Mon Sep 17 00:00:00 2001
From: jasonwucj <jasonwucj@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Sun, 22 Apr 2018 09:05:10 +0000
Subject: [PATCH] [NDS32] Implment USE_LOAD_POST_INCREMENT,
 USE_LOAD_POST_DECREMENT, USE_STORE_POST_DECREMENT and
 USE_STORE_POST_INCREMENT.

gcc/
	* config/nds32/nds32-protos.h (nds32_use_load_post_increment): Declare.
	* config/nds32/nds32.c (nds32_use_load_post_increment): New.
	* config/nds32/nds32.h
	(USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT): Define.
	(USE_STORE_POST_INCREMENT, USE_STORE_POST_DECREMENT): Define.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@259552 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog                   | 8 ++++++++
 gcc/config/nds32/nds32-protos.h | 2 ++
 gcc/config/nds32/nds32.c        | 8 ++++++++
 gcc/config/nds32/nds32.h        | 6 ++++++
 4 files changed, 24 insertions(+)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d84f5bc71f7..3aa554236ca 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,13 @@
 2018-04-22  Shiva Chen  <shiva0217@gmail.com>
 
+	* config/nds32/nds32-protos.h (nds32_use_load_post_increment): Declare.
+	* config/nds32/nds32.c (nds32_use_load_post_increment): New.
+	* config/nds32/nds32.h
+	(USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT): Define.
+	(USE_STORE_POST_INCREMENT, USE_STORE_POST_DECREMENT): Define.
+
+2018-04-22  Shiva Chen  <shiva0217@gmail.com>
+
 	* config/nds32/nds32-protos.h (nds32_ls_333_p): Remove.
 	* config/nds32/nds32.c (nds32_ls_333_p): Remove.
 
diff --git a/gcc/config/nds32/nds32-protos.h b/gcc/config/nds32/nds32-protos.h
index 7e8111e2755..e7b7d4170cc 100644
--- a/gcc/config/nds32/nds32-protos.h
+++ b/gcc/config/nds32/nds32-protos.h
@@ -275,6 +275,8 @@ rtx extract_branch_target_rtx (rtx_insn *);
 rtx extract_branch_condition_rtx (rtx_insn *);
 } // namespace nds32
 
+extern bool nds32_use_load_post_increment(machine_mode);
+
 /* Functions for create nds32 specific optimization pass.  */
 extern rtl_opt_pass *make_pass_nds32_relax_opt (gcc::context *);
 
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index 997cc7672d0..9a8c71204ea 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -1354,6 +1354,14 @@ nds32_naked_function_p (tree func)
   return (t != NULL_TREE);
 }
 
+/* Function that determine whether a load postincrement is a good thing to use
+   for a given mode.  */
+bool
+nds32_use_load_post_increment (machine_mode mode)
+{
+  return (GET_MODE_SIZE (mode) <= GET_MODE_SIZE(E_DImode));
+}
+
 /* Function that check if 'X' is a valid address register.
    The variable 'STRICT' is very important to
    make decision for register number.
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index c5d1e27e0eb..29edccdd040 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -1083,6 +1083,12 @@ enum reg_class
 /* We have "LW.bi   Rt, [Ra], Rb" instruction form.  */
 #define HAVE_POST_MODIFY_REG  1
 
+#define USE_LOAD_POST_INCREMENT(mode) \
+  nds32_use_load_post_increment(mode)
+#define USE_LOAD_POST_DECREMENT(mode) USE_LOAD_POST_INCREMENT(mode)
+#define USE_STORE_POST_DECREMENT(mode) USE_LOAD_POST_DECREMENT(mode)
+#define USE_STORE_POST_INCREMENT(mode) USE_LOAD_POST_INCREMENT(mode)
+
 #define CONSTANT_ADDRESS_P(x) (CONSTANT_P (x) && GET_CODE (x) != CONST_DOUBLE)
 
 #define MAX_REGS_PER_ADDRESS 3
-- 
2.11.4.GIT