From 6ec4bb608ce14ba52869db32ed423198074125c0 Mon Sep 17 00:00:00 2001 From: rth Date: Tue, 8 Jan 2002 06:13:34 +0000 Subject: [PATCH] * regrename.c (find_oldest_value_reg): Ignore the value chain if the original register was copied in a mode with a fewer number of hard registers than the desired mode. (copyprop_hardreg_forward_1): Likewise. (debug_value_data): Fix loop test. * toplev.c (parse_options_and_default_flags): Reenable -fcprop-registers at -O1. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@48624 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 12 +++++++++++- gcc/regrename.c | 26 +++++++++++++++++++++++++- gcc/toplev.c | 2 +- 3 files changed, 37 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 44113da7e9c..cfff16965f0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,14 @@ -002-01-07 Aldy Hernandez +2002-01-07 Richard Henderson + + * regrename.c (find_oldest_value_reg): Ignore the value chain if + the original register was copied in a mode with a fewer number of + hard registers than the desired mode. + (copyprop_hardreg_forward_1): Likewise. + (debug_value_data): Fix loop test. + * toplev.c (parse_options_and_default_flags): Reenable + -fcprop-registers at -O1. + +2002-01-07 Aldy Hernandez * config/rs6000/rs6000.c (bdesc_2arg): Add altivec predicates. (altivec_init_builtins): New node v4si_ftype_v16qi_v16qi. diff --git a/gcc/regrename.c b/gcc/regrename.c index 720e0cf46c9..45f5b8552ef 100644 --- a/gcc/regrename.c +++ b/gcc/regrename.c @@ -1282,6 +1282,20 @@ find_oldest_value_reg (class, reg, vd) enum machine_mode mode = GET_MODE (reg); unsigned int i; + /* If we are accessing REG in some mode other that what we set it in, + make sure that the replacement is valid. In particular, consider + (set (reg:DI r11) (...)) + (set (reg:SI r9) (reg:SI r11)) + (set (reg:SI r10) (...)) + (set (...) (reg:DI r9)) + Replacing r9 with r11 is invalid. */ + if (mode != vd->e[regno].mode) + { + if (HARD_REGNO_NREGS (regno, mode) + > HARD_REGNO_NREGS (regno, vd->e[regno].mode)) + return NULL_RTX; + } + for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno) if (TEST_HARD_REG_BIT (reg_class_contents[class], i) && (vd->e[i].mode == mode @@ -1544,6 +1558,15 @@ copyprop_hardreg_forward_1 (bb, vd) unsigned int i; rtx new; + /* If we are accessing SRC in some mode other that what we + set it in, make sure that the replacement is valid. */ + if (mode != vd->e[regno].mode) + { + if (HARD_REGNO_NREGS (regno, mode) + > HARD_REGNO_NREGS (regno, vd->e[regno].mode)) + goto no_move_special_case; + } + /* If the destination is also a register, try to find a source register in the same class. */ if (REG_P (SET_DEST (set))) @@ -1578,6 +1601,7 @@ copyprop_hardreg_forward_1 (bb, vd) } } } + no_move_special_case: /* For each input operand, replace a hard register with the eldest live copy that's in an appropriate register class. */ @@ -1735,7 +1759,7 @@ debug_value_data (vd) j != INVALID_REGNUM; j = vd->e[j].next_regno) { - if (TEST_HARD_REG_BIT (set, vd->e[j].next_regno)) + if (TEST_HARD_REG_BIT (set, j)) { fprintf (stderr, "[%u] Loop in regno chain\n", j); return; diff --git a/gcc/toplev.c b/gcc/toplev.c index 61054262b39..da508a763f2 100644 --- a/gcc/toplev.c +++ b/gcc/toplev.c @@ -4663,7 +4663,7 @@ parse_options_and_default_flags (argc, argv) flag_omit_frame_pointer = 1; #endif flag_guess_branch_prob = 1; - /* flag_cprop_registers = 1; */ + flag_cprop_registers = 1; } if (optimize >= 2) -- 2.11.4.GIT