From 60a48e7d64d1b56c0579d98ebf1072eeaa2c98fc Mon Sep 17 00:00:00 2001 From: thopre01 Date: Thu, 7 Jul 2016 08:54:59 +0000 Subject: [PATCH] 2016-07-07 Thomas Preud'homme gcc/ * config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability with TARGET_HAVE_MOVT. (TARGET_HAVE_MOVT): Define. * config/arm/arm.c (const_ok_for_op): Check MOVT/MOVW availability with TARGET_HAVE_MOVT. * config/arm/arm.md (arm_movt): Use TARGET_HAVE_MOVT to check MOVT availability. (addsi splitter): Use TARGET_THUMB && TARGET_HAVE_MOVT rather than TARGET_THUMB2. (symbol_refs movsi splitter): Remove TARGET_32BIT check. (arm_movtas_ze): Use TARGET_HAVE_MOVT to check MOVT availability. * config/arm/constraints.md (define_constraint "j"): Use TARGET_HAVE_MOVT to check MOVT availability. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238083 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 16 ++++++++++++++++ gcc/config/arm/arm.c | 2 +- gcc/config/arm/arm.h | 5 ++++- gcc/config/arm/arm.md | 10 +++++----- gcc/config/arm/constraints.md | 2 +- 5 files changed, 27 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a0c61adda0c..7cfc92cf975 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,21 @@ 2016-07-07 Thomas Preud'homme + * config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability + with TARGET_HAVE_MOVT. + (TARGET_HAVE_MOVT): Define. + * config/arm/arm.c (const_ok_for_op): Check MOVT/MOVW + availability with TARGET_HAVE_MOVT. + * config/arm/arm.md (arm_movt): Use TARGET_HAVE_MOVT to check MOVT + availability. + (addsi splitter): Use TARGET_THUMB && TARGET_HAVE_MOVT rather than + TARGET_THUMB2. + (symbol_refs movsi splitter): Remove TARGET_32BIT check. + (arm_movtas_ze): Use TARGET_HAVE_MOVT to check MOVT availability. + * config/arm/constraints.md (define_constraint "j"): Use + TARGET_HAVE_MOVT to check MOVT availability. + +2016-07-07 Thomas Preud'homme + * config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions. 2016-07-07 Thomas Preud'homme diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 3a9b9cb7bb8..2394a173f05 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3947,7 +3947,7 @@ const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code) { case SET: /* See if we can use movw. */ - if (arm_arch_thumb2 && (i & 0xffff0000) == 0) + if (TARGET_HAVE_MOVT && (i & 0xffff0000) == 0) return 1; else /* Otherwise, try mvn. */ diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 07353629c6b..c9aaa609087 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -232,7 +232,7 @@ extern void (*arm_lang_output_object_attributes_hook)(void); /* Should MOVW/MOVT be used in preference to a constant pool. */ #define TARGET_USE_MOVT \ - (arm_arch_thumb2 \ + (TARGET_HAVE_MOVT \ && (arm_disable_literal_pool \ || (!optimize_size && !current_tune->prefer_constant_pool))) @@ -263,6 +263,9 @@ extern void (*arm_lang_output_object_attributes_hook)(void); /* Nonzero if this chip supports load-acquire and store-release. */ #define TARGET_HAVE_LDACQ (TARGET_ARM_ARCH >= 8 && arm_arch_notm) +/* Nonzero if this chip provides the MOVW and MOVW instructions. */ +#define TARGET_HAVE_MOVT (arm_arch_thumb2) + /* Nonzero if integer division instructions supported. */ #define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \ || (TARGET_THUMB2 && arm_arch_thumb_hwdiv)) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 16498316bee..3cd76f935a4 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -5702,7 +5702,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r") (lo_sum:SI (match_operand:SI 1 "nonimmediate_operand" "0") (match_operand:SI 2 "general_operand" "i")))] - "arm_arch_thumb2 && arm_valid_symbolic_address_p (operands[2])" + "TARGET_HAVE_MOVT && arm_valid_symbolic_address_p (operands[2])" "movt%?\t%0, #:upper16:%c2" [(set_attr "predicable" "yes") (set_attr "predicable_short_it" "no") @@ -5762,7 +5762,8 @@ [(set (match_operand:SI 0 "arm_general_register_operand" "") (const:SI (plus:SI (match_operand:SI 1 "general_operand" "") (match_operand:SI 2 "const_int_operand" ""))))] - "TARGET_THUMB2 + "TARGET_THUMB + && TARGET_HAVE_MOVT && arm_disable_literal_pool && reload_completed && GET_CODE (operands[1]) == SYMBOL_REF" @@ -5793,8 +5794,7 @@ (define_split [(set (match_operand:SI 0 "arm_general_register_operand" "") (match_operand:SI 1 "general_operand" ""))] - "TARGET_32BIT - && TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF + "TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF && !flag_pic && !target_word_relocations && !arm_tls_referenced_p (operands[1])" [(clobber (const_int 0))] @@ -10975,7 +10975,7 @@ (const_int 16) (const_int 16)) (match_operand:SI 1 "const_int_operand" ""))] - "arm_arch_thumb2" + "TARGET_HAVE_MOVT" "movt%?\t%0, %L1" [(set_attr "predicable" "yes") (set_attr "predicable_short_it" "no") diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md index 3b71c4a5270..4ece5f013c9 100644 --- a/gcc/config/arm/constraints.md +++ b/gcc/config/arm/constraints.md @@ -66,7 +66,7 @@ (define_constraint "j" "A constant suitable for a MOVW instruction. (ARM/Thumb-2)" - (and (match_test "TARGET_32BIT && arm_arch_thumb2") + (and (match_test "TARGET_HAVE_MOVT") (ior (and (match_code "high") (match_test "arm_valid_symbolic_address_p (XEXP (op, 0))")) (and (match_code "const_int") -- 2.11.4.GIT