From 5a204d73d2cc28c28cde15458dab27f0009c83c6 Mon Sep 17 00:00:00 2001 From: pbrook Date: Thu, 5 May 2005 15:12:01 +0000 Subject: [PATCH] 2005-05-05 Paul Brook * gcc.dg/arm-g2.c: Use effective-target arm32. * gcc.dg/arm-mmx-1.c: Ditto. * gcc.dg/arm-scd42-2.c: Ditto. * gcc.dg/arm-vfp1.c: Ditto. * lib/target-supports.exp (check_effective_target_arm32): New function. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@99269 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/testsuite/ChangeLog | 9 +++++++++ gcc/testsuite/gcc.dg/arm-g2.c | 6 +++--- gcc/testsuite/gcc.dg/arm-mmx-1.c | 5 +++-- gcc/testsuite/gcc.dg/arm-scd42-2.c | 6 +++--- gcc/testsuite/gcc.dg/arm-vfp1.c | 3 ++- gcc/testsuite/lib/target-supports.exp | 37 +++++++++++++++++++++++++++++++++++ 6 files changed, 57 insertions(+), 9 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7058ed25f79..dfd22381ba0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2005-05-05 Paul Brook + + * gcc.dg/arm-g2.c: Use effective-target arm32. + * gcc.dg/arm-mmx-1.c: Ditto. + * gcc.dg/arm-scd42-2.c: Ditto. + * gcc.dg/arm-vfp1.c: Ditto. + * lib/target-supports.exp (check_effective_target_arm32): New + function. + 2005-05-04 Thomas Koenig PR libfortran/21354 diff --git a/gcc/testsuite/gcc.dg/arm-g2.c b/gcc/testsuite/gcc.dg/arm-g2.c index 0120ffb8331..a15b280cc10 100644 --- a/gcc/testsuite/gcc.dg/arm-g2.c +++ b/gcc/testsuite/gcc.dg/arm-g2.c @@ -1,6 +1,7 @@ /* Verify that hardware multiply is preferred on XScale. */ -/* { dg-do compile { target xscale*-*-* } } */ +/* { dg-do compile } */ /* { dg-options "-mcpu=xscale -O2" } */ +/* { dg-require-effective-target arm32 } */ /* Brett Gaines' test case. */ unsigned BCPL(unsigned) __attribute__ ((naked)); @@ -15,5 +16,4 @@ unsigned BCPL(unsigned seed) return seed * 2147001325U + 715136305U; } -/* We want to suppress running for -mthumb but not for -mthumb-interwork. */ -/* { dg-final { global compiler_flags; if ![string match "*-mthumb *" $compiler_flags] { scan-assembler "mla\[ ].*" } } } */ +/* { dg-final { scan-assembler "mla\[ ].*" } } */ diff --git a/gcc/testsuite/gcc.dg/arm-mmx-1.c b/gcc/testsuite/gcc.dg/arm-mmx-1.c index f93b9a35b71..7514a994420 100644 --- a/gcc/testsuite/gcc.dg/arm-mmx-1.c +++ b/gcc/testsuite/gcc.dg/arm-mmx-1.c @@ -1,8 +1,9 @@ /* Verify that if IP is saved to ensure stack alignment, we don't load it into sp. */ -/* { dg-do compile { target arm*-*-* strongarm*-*-* xscale*-*-*} } */ +/* { dg-do compile } */ /* { dg-options "-O -mno-apcs-frame -mcpu=iwmmxt -mabi=iwmmxt" } */ -/* { dg-final { global compiler_flags; if ![string match "*-mthumb *" $compiler_flags] { scan-assembler "ldmfd\[ ]sp!.*ip,\[ ]*pc" } } } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-final { scan-assembler "ldmfd\[ ]sp!.*ip,\[ ]*pc" } } */ /* This function uses all the call-saved registers, namely r4, r5, r6, r7, r8, r9, sl, fp. Since we also save lr, that leaves an odd diff --git a/gcc/testsuite/gcc.dg/arm-scd42-2.c b/gcc/testsuite/gcc.dg/arm-scd42-2.c index 75e72747e29..1c257c173b6 100644 --- a/gcc/testsuite/gcc.dg/arm-scd42-2.c +++ b/gcc/testsuite/gcc.dg/arm-scd42-2.c @@ -1,6 +1,7 @@ /* Verify that mov is preferred on XScale for loading a 2 byte constant. */ -/* { dg-do compile { target xscale-*-* } } */ +/* { dg-do compile } */ /* { dg-options "-mcpu=xscale -O" } */ +/* { dg-require-effective-target arm32 } */ unsigned load2(void) __attribute__ ((naked)); unsigned load2(void) @@ -13,5 +14,4 @@ unsigned load2(void) return 273; } -/* We want to suppress running for -mthumb but not for -mthumb-interwork. */ -/* { dg-final { global compiler_flags; if ![string match "*-mthumb *" $compiler_flags] { scan-assembler "mov\[ ].*272" } } } */ +/* { dg-final { scan-assembler "mov\[ ].*272" } } */ diff --git a/gcc/testsuite/gcc.dg/arm-vfp1.c b/gcc/testsuite/gcc.dg/arm-vfp1.c index e1b221e0e4f..5898e8027e6 100644 --- a/gcc/testsuite/gcc.dg/arm-vfp1.c +++ b/gcc/testsuite/gcc.dg/arm-vfp1.c @@ -1,5 +1,6 @@ -/* { dg-do compile { target arm*-*-* } } */ +/* { dg-do compile } */ /* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */ +/* { dg-require-effective-target arm32 } */ extern float fabsf (float); extern float sqrtf (float); diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 76b9edecac7..6d47ece07f0 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -698,6 +698,43 @@ proc check_effective_target_vect_int { } { return $et_vect_int_saved } +# Return 1 is this is an arm target using 32-bit instructions +proc check_effective_target_arm32 { } { + global et_arm32_saved + global et_arm32_target_name + global compiler_flags + + if { ![info exists et_arm32_target_name] } { + set et_arm32_target_name "" + } + + # If the target has changed since we set the cached value, clear it. + set current_target [current_target_name] + if { $current_target != $et_arm32_target_name } { + verbose "check_effective_target_arm32: `$et_arm32_target_name' `$current_target'" 2 + set et_arm32_target_name $current_target + if { [info exists et_arm32_saved] } { + verbose "check_effective_target_arm32: removing cached result" 2 + unset et_arm32_saved + } + } + + if [info exists et_arm32_saved] { + verbose "check-effective_target_arm32: using cached result" 2 + } else { + set et_arm32_saved 0 + if { [istarget arm-*-*] + || [istarget strongarm*-*-*] + || [istarget xscale-*-*] } { + if ![string match "*-mthumb *" $compiler_flags] { + set et_arm32_saved 1 + } + } + } + verbose "check_effective_target_arm32: returning $et_arm32_saved" 2 + return $et_arm32_saved +} + # Return 1 if the target supports hardware vector shift operation. proc check_effective_target_vect_shift { } { -- 2.11.4.GIT