From 03eccdc8ffdc4c9fec9df4c1e7f8e5392478d7f9 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Sat, 25 Sep 2004 06:35:21 +0000 Subject: [PATCH] * config/mips/mips.md (loadx, storex): Define for V2SF. From-SVN: r88089 --- gcc/ChangeLog | 4 ++++ gcc/config/mips/mips.md | 4 ++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ab76350aa11..2bac73bda82 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2004-09-25 Richard Sandiford + + * config/mips/mips.md (loadx, storex): Define for V2SF. + 2004-09-25 Ulrich Weigand * config/s390/s390-protos.h (s390_back_chain_rtx): Add prototype. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index b8239edf7b2..41aeabc0526 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -355,8 +355,8 @@ (define_mode_attr store [(SI "sw") (DI "sd")]) ;; Similarly for MIPS IV indexed FPR loads and stores. -(define_mode_attr loadx [(SF "lwxc1") (DF "ldxc1")]) -(define_mode_attr storex [(SF "swxc1") (DF "sdxc1")]) +(define_mode_attr loadx [(SF "lwxc1") (DF "ldxc1") (V2SF "ldxc1")]) +(define_mode_attr storex [(SF "swxc1") (DF "sdxc1") (V2SF "sdxc1")]) ;; The unextended ranges of the MIPS16 addiu and daddiu instructions ;; are different. Some forms of unextended addiu have an 8-bit immediate -- 2.11.4.GIT