From 00e59df9a8ecab687e53058a52de9ec6568fc753 Mon Sep 17 00:00:00 2001 From: meissner Date: Mon, 21 Mar 2011 16:21:30 +0000 Subject: [PATCH] Make UNSPEC/UNSPECV constants use the enum; Fix 48192; Add test case for 48053 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@171247 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 17 ++ gcc/config/rs6000/altivec.md | 252 +++++++++++++-------------- gcc/config/rs6000/dfp.md | 8 +- gcc/config/rs6000/paired.md | 14 +- gcc/config/rs6000/rs6000.md | 129 +++++++------- gcc/config/rs6000/sync.md | 7 +- gcc/config/rs6000/vector.md | 3 +- gcc/config/rs6000/vsx.md | 38 ++-- gcc/testsuite/ChangeLog | 9 + gcc/testsuite/gcc.target/powerpc/pr48053-3.c | 41 +++++ gcc/testsuite/gcc.target/powerpc/pr48192.c | 49 ++++++ libcpp/ChangeLog | 8 + libcpp/directives.c | 14 +- libcpp/expr.c | 7 +- 14 files changed, 364 insertions(+), 232 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr48053-3.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr48192.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 576df6c4aef..baf4d854a07 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2011-03-21 Michael Meissner + + * config/rs6000/rs6000.md (UNSPEC_*, UNSPECV_*): Redefine all + UNSPEC constants to be in the unspec enumeration, and redefine + all UNSPECV constants to be in the unspecv enumeration, so that + dumps print which unspec/unspec_volatile this is. + * config/rs6000/vector.md (UNSPEC_*): Ditto. + * config/rs6000/paired.md (UNSPEC_*): Ditto. + * config/rs6000/vsx.md (UNSPEC_*): Ditto. + * config/rs6000/altivec.md (UNSPEC_*, UNSPECV_*): Ditto. + * config/rs6000/dfp.md (UNSPEC_*): Ditto. + + * config/rs6000/rs6000.md (UNSPECV_ISYNC, UNSPECV_LWSYNC): Rename + UNSPEC_ISYNC and UNSPEC_HWSYNC to UNSPECV_ISYNC and + UNSPECV_LWSYNC, since these are used as unspec_volatile. + * config/rs6000/sync.md (isync, lwsync): Ditto. + 2011-03-21 Richard Guenther * params.def (lto-min-partition): Fix typo. diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index d7357ee3262..d507b86973f 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -19,138 +19,130 @@ ;; along with GCC; see the file COPYING3. If not see ;; . -(define_constants - ;; 51-62 deleted - [(UNSPEC_VCMPBFP 64) - (UNSPEC_VMSUMU 65) - (UNSPEC_VMSUMM 66) - (UNSPEC_VMSUMSHM 68) - (UNSPEC_VMSUMUHS 69) - (UNSPEC_VMSUMSHS 70) - (UNSPEC_VMHADDSHS 71) - (UNSPEC_VMHRADDSHS 72) - (UNSPEC_VMLADDUHM 73) - (UNSPEC_VADDCUW 75) - (UNSPEC_VADDU 76) - (UNSPEC_VADDS 77) - (UNSPEC_VAVGU 80) - (UNSPEC_VAVGS 81) - (UNSPEC_VMULEUB 83) - (UNSPEC_VMULESB 84) - (UNSPEC_VMULEUH 85) - (UNSPEC_VMULESH 86) - (UNSPEC_VMULOUB 87) - (UNSPEC_VMULOSB 88) - (UNSPEC_VMULOUH 89) - (UNSPEC_VMULOSH 90) - (UNSPEC_VPKUHUM 93) - (UNSPEC_VPKUWUM 94) - (UNSPEC_VPKPX 95) - (UNSPEC_VPKSHSS 97) - (UNSPEC_VPKSWSS 99) - (UNSPEC_VPKUHUS 100) - (UNSPEC_VPKSHUS 101) - (UNSPEC_VPKUWUS 102) - (UNSPEC_VPKSWUS 103) - ;; 104 deleted - (UNSPEC_VSLV4SI 110) - (UNSPEC_VSLO 111) - (UNSPEC_VSR 118) - (UNSPEC_VSRO 119) - (UNSPEC_VSUBCUW 124) - (UNSPEC_VSUBU 125) - (UNSPEC_VSUBS 126) - (UNSPEC_VSUM4UBS 131) - (UNSPEC_VSUM4S 132) - (UNSPEC_VSUM2SWS 134) - (UNSPEC_VSUMSWS 135) - (UNSPEC_VPERM 144) - (UNSPEC_VPERM_UNS 145) - ;; 148 deleted - (UNSPEC_VRFIN 149) - ;; 150 deleted - (UNSPEC_VCFUX 151) - (UNSPEC_VCFSX 152) - (UNSPEC_VCTUXS 153) - (UNSPEC_VCTSXS 154) - (UNSPEC_VLOGEFP 155) - (UNSPEC_VEXPTEFP 156) - ;; 157-162 deleted - (UNSPEC_VLSDOI 163) - (UNSPEC_VUPKHSB 167) - (UNSPEC_VUPKHPX 168) - (UNSPEC_VUPKHSH 169) - (UNSPEC_VUPKLSB 170) - (UNSPEC_VUPKLPX 171) - (UNSPEC_VUPKLSH 172) - ;; 173 deleted - (UNSPEC_DST 190) - (UNSPEC_DSTT 191) - (UNSPEC_DSTST 192) - (UNSPEC_DSTSTT 193) - (UNSPEC_LVSL 194) - (UNSPEC_LVSR 195) - (UNSPEC_LVE 196) - (UNSPEC_STVX 201) - (UNSPEC_STVXL 202) - (UNSPEC_STVE 203) - (UNSPEC_SET_VSCR 213) - (UNSPEC_GET_VRSAVE 214) - (UNSPEC_LVX 215) - (UNSPEC_REDUC_PLUS 217) - (UNSPEC_VECSH 219) - (UNSPEC_EXTEVEN_V4SI 220) - (UNSPEC_EXTEVEN_V8HI 221) - (UNSPEC_EXTEVEN_V16QI 222) - (UNSPEC_EXTEVEN_V4SF 223) - (UNSPEC_EXTODD_V4SI 224) - (UNSPEC_EXTODD_V8HI 225) - (UNSPEC_EXTODD_V16QI 226) - (UNSPEC_EXTODD_V4SF 227) - (UNSPEC_INTERHI_V4SI 228) - (UNSPEC_INTERHI_V8HI 229) - (UNSPEC_INTERHI_V16QI 230) - ;; delete 231 - (UNSPEC_INTERLO_V4SI 232) - (UNSPEC_INTERLO_V8HI 233) - (UNSPEC_INTERLO_V16QI 234) - ;; delete 235 - (UNSPEC_LVLX 236) - (UNSPEC_LVLXL 237) - (UNSPEC_LVRX 238) - (UNSPEC_LVRXL 239) - (UNSPEC_STVLX 240) - (UNSPEC_STVLXL 241) - (UNSPEC_STVRX 242) - (UNSPEC_STVRXL 243) - (UNSPEC_VMULWHUB 308) - (UNSPEC_VMULWLUB 309) - (UNSPEC_VMULWHSB 310) - (UNSPEC_VMULWLSB 311) - (UNSPEC_VMULWHUH 312) - (UNSPEC_VMULWLUH 313) - (UNSPEC_VMULWHSH 314) - (UNSPEC_VMULWLSH 315) - (UNSPEC_VUPKHUB 316) - (UNSPEC_VUPKHUH 317) - (UNSPEC_VUPKLUB 318) - (UNSPEC_VUPKLUH 319) - (UNSPEC_VPERMSI 320) - (UNSPEC_VPERMHI 321) - (UNSPEC_INTERHI 322) - (UNSPEC_INTERLO 323) - (UNSPEC_VUPKHS_V4SF 324) - (UNSPEC_VUPKLS_V4SF 325) - (UNSPEC_VUPKHU_V4SF 326) - (UNSPEC_VUPKLU_V4SF 327) +(define_c_enum "unspec" + [UNSPEC_VCMPBFP + UNSPEC_VMSUMU + UNSPEC_VMSUMM + UNSPEC_VMSUMSHM + UNSPEC_VMSUMUHS + UNSPEC_VMSUMSHS + UNSPEC_VMHADDSHS + UNSPEC_VMHRADDSHS + UNSPEC_VMLADDUHM + UNSPEC_VADDCUW + UNSPEC_VADDU + UNSPEC_VADDS + UNSPEC_VAVGU + UNSPEC_VAVGS + UNSPEC_VMULEUB + UNSPEC_VMULESB + UNSPEC_VMULEUH + UNSPEC_VMULESH + UNSPEC_VMULOUB + UNSPEC_VMULOSB + UNSPEC_VMULOUH + UNSPEC_VMULOSH + UNSPEC_VPKUHUM + UNSPEC_VPKUWUM + UNSPEC_VPKPX + UNSPEC_VPKSHSS + UNSPEC_VPKSWSS + UNSPEC_VPKUHUS + UNSPEC_VPKSHUS + UNSPEC_VPKUWUS + UNSPEC_VPKSWUS + UNSPEC_VSLV4SI + UNSPEC_VSLO + UNSPEC_VSR + UNSPEC_VSRO + UNSPEC_VSUBCUW + UNSPEC_VSUBU + UNSPEC_VSUBS + UNSPEC_VSUM4UBS + UNSPEC_VSUM4S + UNSPEC_VSUM2SWS + UNSPEC_VSUMSWS + UNSPEC_VPERM + UNSPEC_VPERM_UNS + UNSPEC_VRFIN + UNSPEC_VCFUX + UNSPEC_VCFSX + UNSPEC_VCTUXS + UNSPEC_VCTSXS + UNSPEC_VLOGEFP + UNSPEC_VEXPTEFP + UNSPEC_VLSDOI + UNSPEC_VUPKHSB + UNSPEC_VUPKHPX + UNSPEC_VUPKHSH + UNSPEC_VUPKLSB + UNSPEC_VUPKLPX + UNSPEC_VUPKLSH + UNSPEC_DST + UNSPEC_DSTT + UNSPEC_DSTST + UNSPEC_DSTSTT + UNSPEC_LVSL + UNSPEC_LVSR + UNSPEC_LVE + UNSPEC_STVX + UNSPEC_STVXL + UNSPEC_STVE + UNSPEC_SET_VSCR + UNSPEC_GET_VRSAVE + UNSPEC_LVX + UNSPEC_REDUC_PLUS + UNSPEC_VECSH + UNSPEC_EXTEVEN_V4SI + UNSPEC_EXTEVEN_V8HI + UNSPEC_EXTEVEN_V16QI + UNSPEC_EXTEVEN_V4SF + UNSPEC_EXTODD_V4SI + UNSPEC_EXTODD_V8HI + UNSPEC_EXTODD_V16QI + UNSPEC_EXTODD_V4SF + UNSPEC_INTERHI_V4SI + UNSPEC_INTERHI_V8HI + UNSPEC_INTERHI_V16QI + UNSPEC_INTERLO_V4SI + UNSPEC_INTERLO_V8HI + UNSPEC_INTERLO_V16QI + UNSPEC_LVLX + UNSPEC_LVLXL + UNSPEC_LVRX + UNSPEC_LVRXL + UNSPEC_STVLX + UNSPEC_STVLXL + UNSPEC_STVRX + UNSPEC_STVRXL + UNSPEC_VMULWHUB + UNSPEC_VMULWLUB + UNSPEC_VMULWHSB + UNSPEC_VMULWLSB + UNSPEC_VMULWHUH + UNSPEC_VMULWLUH + UNSPEC_VMULWHSH + UNSPEC_VMULWLSH + UNSPEC_VUPKHUB + UNSPEC_VUPKHUH + UNSPEC_VUPKLUB + UNSPEC_VUPKLUH + UNSPEC_VPERMSI + UNSPEC_VPERMHI + UNSPEC_INTERHI + UNSPEC_INTERLO + UNSPEC_VUPKHS_V4SF + UNSPEC_VUPKLS_V4SF + UNSPEC_VUPKHU_V4SF + UNSPEC_VUPKLU_V4SF ]) -(define_constants - [(UNSPECV_SET_VRSAVE 30) - (UNSPECV_MTVSCR 186) - (UNSPECV_MFVSCR 187) - (UNSPECV_DSSALL 188) - (UNSPECV_DSS 189) +(define_c_enum "unspecv" + [UNSPECV_SET_VRSAVE + UNSPECV_MTVSCR + UNSPECV_MFVSCR + UNSPECV_DSSALL + UNSPECV_DSS ]) ;; Vec int modes diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md index 5ffe7fcffc7..d57ac93fbb9 100644 --- a/gcc/config/rs6000/dfp.md +++ b/gcc/config/rs6000/dfp.md @@ -1,5 +1,5 @@ ;; Decimal Floating Point (DFP) patterns. -;; Copyright (C) 2007, 2008, 2010 +;; Copyright (C) 2007, 2008, 2010, 2011 ;; Free Software Foundation, Inc. ;; Contributed by Ben Elliston (bje@au.ibm.com) and Peter Bergner ;; (bergner@vnet.ibm.com). @@ -24,9 +24,9 @@ ;; UNSPEC usage ;; -(define_constants - [(UNSPEC_MOVSD_LOAD 400) - (UNSPEC_MOVSD_STORE 401) +(define_c_enum "unspec" + [UNSPEC_MOVSD_LOAD + UNSPEC_MOVSD_STORE ]) diff --git a/gcc/config/rs6000/paired.md b/gcc/config/rs6000/paired.md index 0533f0097cf..d1b0e8e45f2 100644 --- a/gcc/config/rs6000/paired.md +++ b/gcc/config/rs6000/paired.md @@ -1,5 +1,5 @@ ;; PowerPC paired single and double hummer description -;; Copyright (C) 2007, 2009, 2010 +;; Copyright (C) 2007, 2009, 2010, 2011 ;; Free Software Foundation, Inc. ;; Contributed by David Edelsohn and Revital Eres ;; @@ -20,12 +20,12 @@ ;; along with this program; see the file COPYING3. If not see ;; . -(define_constants -[(UNSPEC_INTERHI_V2SF 330) - (UNSPEC_INTERLO_V2SF 331) - (UNSPEC_EXTEVEN_V2SF 332) - (UNSPEC_EXTODD_V2SF 333) -]) +(define_c_enum "unspec" + [UNSPEC_INTERHI_V2SF + UNSPEC_INTERLO_V2SF + UNSPEC_EXTEVEN_V2SF + UNSPEC_EXTODD_V2SF + ]) (define_insn "paired_negv2sf2" [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 24fd5163eee..dafc2d2a4f9 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1,6 +1,6 @@ ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler ;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, -;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 +;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 ;; Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) @@ -53,76 +53,77 @@ ;; UNSPEC usage ;; -(define_constants - [(UNSPEC_FRSP 0) ; frsp for POWER machines - (UNSPEC_PROBE_STACK 4) ; probe stack memory reference - (UNSPEC_TIE 5) ; tie stack contents and stack pointer - (UNSPEC_TOCPTR 6) ; address of a word pointing to the TOC - (UNSPEC_TOC 7) ; address of the TOC (more-or-less) - (UNSPEC_MOVSI_GOT 8) - (UNSPEC_MV_CR_OV 9) ; move_from_CR_ov_bit - (UNSPEC_FCTIWZ 10) - (UNSPEC_FRIM 11) - (UNSPEC_FRIN 12) - (UNSPEC_FRIP 13) - (UNSPEC_FRIZ 14) - (UNSPEC_LD_MPIC 15) ; load_macho_picbase - (UNSPEC_MPIC_CORRECT 16) ; macho_correct_pic - (UNSPEC_TLSGD 17) - (UNSPEC_TLSLD 18) - (UNSPEC_MOVESI_FROM_CR 19) - (UNSPEC_MOVESI_TO_CR 20) - (UNSPEC_TLSDTPREL 21) - (UNSPEC_TLSDTPRELHA 22) - (UNSPEC_TLSDTPRELLO 23) - (UNSPEC_TLSGOTDTPREL 24) - (UNSPEC_TLSTPREL 25) - (UNSPEC_TLSTPRELHA 26) - (UNSPEC_TLSTPRELLO 27) - (UNSPEC_TLSGOTTPREL 28) - (UNSPEC_TLSTLS 29) - (UNSPEC_FIX_TRUNC_TF 30) ; fadd, rounding towards zero - (UNSPEC_MV_CR_GT 31) ; move_from_CR_gt_bit - (UNSPEC_STFIWX 32) - (UNSPEC_POPCNTB 33) - (UNSPEC_FRES 34) - (UNSPEC_SP_SET 35) - (UNSPEC_SP_TEST 36) - (UNSPEC_SYNC 37) - (UNSPEC_LWSYNC 38) - (UNSPEC_ISYNC 39) - (UNSPEC_SYNC_OP 40) - (UNSPEC_ATOMIC 41) - (UNSPEC_CMPXCHG 42) - (UNSPEC_XCHG 43) - (UNSPEC_AND 44) - (UNSPEC_DLMZB 45) - (UNSPEC_DLMZB_CR 46) - (UNSPEC_DLMZB_STRLEN 47) - (UNSPEC_RSQRT 48) - (UNSPEC_TOCREL 49) - (UNSPEC_MACHOPIC_OFFSET 50) - (UNSPEC_BPERM 51) - (UNSPEC_COPYSIGN 52) - (UNSPEC_PARITY 53) - (UNSPEC_FCTIW 54) - (UNSPEC_FCTID 55) - (UNSPEC_LFIWAX 56) - (UNSPEC_LFIWZX 57) - (UNSPEC_FCTIWUZ 58) +(define_c_enum "unspec" + [UNSPEC_FRSP ; frsp for POWER machines + UNSPEC_PROBE_STACK ; probe stack memory reference + UNSPEC_TIE ; tie stack contents and stack pointer + UNSPEC_TOCPTR ; address of a word pointing to the TOC + UNSPEC_TOC ; address of the TOC (more-or-less) + UNSPEC_MOVSI_GOT + UNSPEC_MV_CR_OV ; move_from_CR_ov_bit + UNSPEC_FCTIWZ + UNSPEC_FRIM + UNSPEC_FRIN + UNSPEC_FRIP + UNSPEC_FRIZ + UNSPEC_LD_MPIC ; load_macho_picbase + UNSPEC_MPIC_CORRECT ; macho_correct_pic + UNSPEC_TLSGD + UNSPEC_TLSLD + UNSPEC_MOVESI_FROM_CR + UNSPEC_MOVESI_TO_CR + UNSPEC_TLSDTPREL + UNSPEC_TLSDTPRELHA + UNSPEC_TLSDTPRELLO + UNSPEC_TLSGOTDTPREL + UNSPEC_TLSTPREL + UNSPEC_TLSTPRELHA + UNSPEC_TLSTPRELLO + UNSPEC_TLSGOTTPREL + UNSPEC_TLSTLS + UNSPEC_FIX_TRUNC_TF ; fadd, rounding towards zero + UNSPEC_MV_CR_GT ; move_from_CR_gt_bit + UNSPEC_STFIWX + UNSPEC_POPCNTB + UNSPEC_FRES + UNSPEC_SP_SET + UNSPEC_SP_TEST + UNSPEC_SYNC + UNSPEC_SYNC_OP + UNSPEC_ATOMIC + UNSPEC_CMPXCHG + UNSPEC_XCHG + UNSPEC_AND + UNSPEC_DLMZB + UNSPEC_DLMZB_CR + UNSPEC_DLMZB_STRLEN + UNSPEC_RSQRT + UNSPEC_TOCREL + UNSPEC_MACHOPIC_OFFSET + UNSPEC_BPERM + UNSPEC_COPYSIGN + UNSPEC_PARITY + UNSPEC_FCTIW + UNSPEC_FCTID + UNSPEC_LFIWAX + UNSPEC_LFIWZX + UNSPEC_FCTIWUZ ]) ;; ;; UNSPEC_VOLATILE usage ;; -(define_constants - [(UNSPECV_BLOCK 0) - (UNSPECV_LL 1) ; load-locked - (UNSPECV_SC 2) ; store-conditional - (UNSPECV_PROBE_STACK_RANGE 3) ; probe range of stack addresses - (UNSPECV_EH_RR 9) ; eh_reg_restore +(define_c_enum "unspecv" + [UNSPECV_BLOCK + UNSPECV_LL ; load-locked + UNSPECV_SC ; store-conditional + UNSPECV_PROBE_STACK_RANGE ; probe range of stack addresses + UNSPECV_EH_RR ; eh_reg_restore + UNSPECV_ISYNC ; isync instruction + UNSPECV_LWSYNC ; lwsync ]) + ;; Define an insn type attribute. This is used in function unit delay ;; computations. diff --git a/gcc/config/rs6000/sync.md b/gcc/config/rs6000/sync.md index f6cc91d3d56..c3fbd9ee028 100644 --- a/gcc/config/rs6000/sync.md +++ b/gcc/config/rs6000/sync.md @@ -1,5 +1,6 @@ ;; Machine description for PowerPC synchronization instructions. -;; Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc. +;; Copyright (C) 2005, 2007, 2008, 2009, 2011 +;; Free Software Foundation, Inc. ;; Contributed by Geoffrey Keating. ;; This file is part of GCC. @@ -591,7 +592,7 @@ (define_insn "isync" [(set (mem:BLK (match_scratch 0 "X")) - (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_ISYNC))] + (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPECV_ISYNC))] "" "{ics|isync}" [(set_attr "type" "isync")]) @@ -610,7 +611,7 @@ ; Some AIX assemblers don't accept lwsync, so we use a .long. (define_insn "lwsync" [(set (mem:BLK (match_scratch 0 "X")) - (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_LWSYNC))] + (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPECV_LWSYNC))] "" { if (TARGET_NO_LWSYNC) diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index 5335d9d4301..c5a7870a5c7 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -74,8 +74,7 @@ (V2DF "V2DI")]) ;; constants for unspec -(define_constants - [(UNSPEC_PREDICATE 400)]) +(define_c_enum "unspec" [UNSPEC_PREDICATE]) ;; Vector move instructions. diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index a5b5a5374cb..fc331dc27ed 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -183,25 +183,25 @@ (V16QI "QI")]) ;; Constants for creating unspecs -(define_constants - [(UNSPEC_VSX_CONCAT 500) - (UNSPEC_VSX_CVDPSXWS 501) - (UNSPEC_VSX_CVDPUXWS 502) - (UNSPEC_VSX_CVSPDP 503) - (UNSPEC_VSX_CVSXWDP 504) - (UNSPEC_VSX_CVUXWDP 505) - (UNSPEC_VSX_CVSXDSP 506) - (UNSPEC_VSX_CVUXDSP 507) - (UNSPEC_VSX_CVSPSXDS 508) - (UNSPEC_VSX_CVSPUXDS 509) - ;; 510-514 deleted - (UNSPEC_VSX_TDIV 515) - (UNSPEC_VSX_TSQRT 516) - (UNSPEC_VSX_XXPERMDI 517) - (UNSPEC_VSX_SET 518) - (UNSPEC_VSX_ROUND_I 519) - (UNSPEC_VSX_ROUND_IC 520) - (UNSPEC_VSX_SLDWI 521)]) +(define_c_enum "unspec" + [UNSPEC_VSX_CONCAT + UNSPEC_VSX_CVDPSXWS + UNSPEC_VSX_CVDPUXWS + UNSPEC_VSX_CVSPDP + UNSPEC_VSX_CVSXWDP + UNSPEC_VSX_CVUXWDP + UNSPEC_VSX_CVSXDSP + UNSPEC_VSX_CVUXDSP + UNSPEC_VSX_CVSPSXDS + UNSPEC_VSX_CVSPUXDS + UNSPEC_VSX_TDIV + UNSPEC_VSX_TSQRT + UNSPEC_VSX_XXPERMDI + UNSPEC_VSX_SET + UNSPEC_VSX_ROUND_I + UNSPEC_VSX_ROUND_IC + UNSPEC_VSX_SLDWI + ]) ;; VSX moves (define_insn "*vsx_mov" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8bce5264b36..97fa329bb00 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2011-03-21 Michael Meissner + + PR preprocessor/48192 + * gcc.target/powerpc/pr48192.c: New file. + + PR target/48053 + * gcc.target/powerpc/pr48053-3.c: New file, add test case for + split problem of 0 being loaded in a VSX register. + 2011-03-21 Richard Guenther PR c/47939 diff --git a/gcc/testsuite/gcc.target/powerpc/pr48053-3.c b/gcc/testsuite/gcc.target/powerpc/pr48053-3.c new file mode 100644 index 00000000000..399b3d3ea36 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr48053-3.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O3 -mcpu=power7" } */ + +/* Cut down example from s_scalbnl that aborted on 32-bit when the fix for + 48053 went in to allow creating DImode 0's in VSX registers. */ + +typedef union +{ + long double value; + struct + { + unsigned long long msw; + unsigned long long lsw; + } parts64; + struct + { + unsigned int w0, w1, w2, w3; + } parts32; +} ieee854_long_double_shape_type; + +static const long double twolm54 = 5.55111512312578270212e-17; + +long double foo (long double x, int n) +{ + long long k, hx, lx; + ieee854_long_double_shape_type qw_u; + + qw_u.value = x; + hx = qw_u.parts64.msw; + lx = qw_u.parts64.lsw; + + k = ((hx >> 52) & 0x7ff) + n + 54; + + qw_u.parts64.msw = ((hx & 0x800fffffffffffffULL) | (k << 52)); + qw_u.parts64.lsw = lx; + x = qw_u.value; + + return x*twolm54; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr48192.c b/gcc/testsuite/gcc.target/powerpc/pr48192.c new file mode 100644 index 00000000000..5159260857c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr48192.c @@ -0,0 +1,49 @@ +/* { dg-do compile } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O3 -mcpu=power7 -std=gnu89" } */ + +/* Make sure that the conditional macros vector, bool, and pixel are not + considered as being defined. */ + +#ifdef bool +#error "bool is considered defined" +#endif + +#ifdef vector +#error "vector is considered defined" +#endif + +#ifdef pixel +#error "pixel is condsidered defined" +#endif + +#if defined(bool) +#error "bool is considered defined" +#endif + +#if defined(vector) +#error "vector is considered defined" +#endif + +#if defined(pixel) +#error "pixel is condsidered defined" +#endif + +#ifndef bool +#else +#error "bool is considered defined" +#endif + +#ifndef vector +#else +#error "vector is considered defined" +#endif + +#ifndef pixel +#else +#error "pixel is condsidered defined" +#endif + +#define bool long double +bool pixel = 0; diff --git a/libcpp/ChangeLog b/libcpp/ChangeLog index 6ef4788d99a..c08e6fe139b 100644 --- a/libcpp/ChangeLog +++ b/libcpp/ChangeLog @@ -1,3 +1,11 @@ +2011-03-21 Michael Meissner + + PR preprocessor/48192 + * directives.c (do_ifdef): Do not consider conditional macros as + being defined. + (do_ifndef): Ditto. + * expr.c (parse_defined): Ditto. + 2011-03-18 Richard Henderson PR bootstrap/45381 diff --git a/libcpp/directives.c b/libcpp/directives.c index 85a17b146c2..f244ae5b5b2 100644 --- a/libcpp/directives.c +++ b/libcpp/directives.c @@ -1819,7 +1819,12 @@ do_ifdef (cpp_reader *pfile) if (node) { - skip = node->type != NT_MACRO; + /* Do not treat conditional macros as being defined. This is due to + the powerpc and spu ports using conditional macros for 'vector', + 'bool', and 'pixel' to act as conditional keywords. This messes + up tests like #ifndef bool. */ + skip = (node->type != NT_MACRO + || ((node->flags & NODE_CONDITIONAL) != 0)); _cpp_mark_macro_used (node); if (!(node->flags & NODE_USED)) { @@ -1860,7 +1865,12 @@ do_ifndef (cpp_reader *pfile) if (node) { - skip = node->type == NT_MACRO; + /* Do not treat conditional macros as being defined. This is due to + the powerpc and spu ports using conditional macros for 'vector', + 'bool', and 'pixel' to act as conditional keywords. This messes + up tests like #ifndef bool. */ + skip = (node->type == NT_MACRO + && ((node->flags & NODE_CONDITIONAL) == 0)); _cpp_mark_macro_used (node); if (!(node->flags & NODE_USED)) { diff --git a/libcpp/expr.c b/libcpp/expr.c index d2fec2a56a6..3c36127b54f 100644 --- a/libcpp/expr.c +++ b/libcpp/expr.c @@ -720,10 +720,15 @@ parse_defined (cpp_reader *pfile) pfile->state.prevent_expansion--; + /* Do not treat conditional macros as being defined. This is due to the + powerpc and spu ports using conditional macros for 'vector', 'bool', and + 'pixel' to act as conditional keywords. This messes up tests like #ifndef + bool. */ result.unsignedp = false; result.high = 0; result.overflow = false; - result.low = node && node->type == NT_MACRO; + result.low = (node && node->type == NT_MACRO + && (node->flags & NODE_CONDITIONAL) == 0); return result; } -- 2.11.4.GIT