From 0045890aebfc0da3af0bcabde0b591f77d68392c Mon Sep 17 00:00:00 2001 From: rearnsha Date: Mon, 22 Jul 2002 17:41:27 +0000 Subject: [PATCH] * arm.md (movqi): If optimizing and we can create pseudos, use a ZERO_EXTEND to load from memory, then copy the result into the target. (movhi): Likewise, but only for ARMv4. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@55655 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 7 +++++++ gcc/config/arm/arm.md | 21 ++++++++++++++++++--- 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 81e9c22417f..5dc440709ae 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2002-07-22 Richard Earnshaw + + * arm.md (movqi): If optimizing and we can create pseudos, use + a ZERO_EXTEND to load from memory, then copy the result into the + target. + (movhi): Likewise, but only for ARMv4. + 2002-07-22 Neil Booth * ssa-ccp.c (PHI_PARMS): Remove. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 8e4b9c06d13..8bd129cf0e5 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4417,6 +4417,14 @@ emit_insn (gen_movsi (reg, GEN_INT (val))); operands[1] = gen_lowpart (HImode, reg); } + else if (arm_arch4 && !no_new_pseudos && optimize > 0 + && GET_CODE (operands[1]) == MEM) + { + rtx reg = gen_reg_rtx (SImode); + + emit_insn (gen_zero_extendhisi2 (reg, operands[1])); + operands[1] = gen_lowpart (HImode, reg); + } else if (!arm_arch4) { /* Note: We do not have to worry about TARGET_MMU_TRAPS @@ -4814,9 +4822,16 @@ emit_insn (gen_movsi (reg, operands[1])); operands[1] = gen_lowpart (QImode, reg); } - if (GET_CODE (operands[0]) == MEM) - operands[1] = force_reg (QImode, operands[1]); - } + if (GET_CODE (operands[1]) == MEM && optimize > 0) + { + rtx reg = gen_reg_rtx (SImode); + + emit_insn (gen_zero_extendqisi2 (reg, operands[1])); + operands[1] = gen_lowpart (QImode, reg); + } + if (GET_CODE (operands[0]) == MEM) + operands[1] = force_reg (QImode, operands[1]); + } } else /* TARGET_THUMB */ { -- 2.11.4.GIT