[AArch64] 64-bit float vreinterpret implemention
commitfe44ff96c8bf1344261c14a1b426225a576d59a8
authormshawcroft <mshawcroft@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 22 Apr 2014 16:06:05 +0000 (22 16:06 +0000)
committermshawcroft <mshawcroft@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 22 Apr 2014 16:06:05 +0000 (22 16:06 +0000)
tree1b1af38f438709d7a4e5b0042f7df7b75da489b5
parentdbdcebb484670621e0d8eea554b3dd76fee8e58a
[AArch64] 64-bit float vreinterpret implemention

This patch introduces vreinterpret implementation for vectors with
64-bit float lanes and adds testcase for those intrinsics.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209642 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/aarch64-builtins.c
gcc/config/aarch64/aarch64-simd-builtins.def
gcc/config/aarch64/aarch64-simd.md
gcc/config/aarch64/arm_neon.h
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/vreinterpret_f64_1.c [new file with mode: 0644]