AArch64: Improve immediate expansion [PR105928]
commitfc7070025d1a6668ff6cb4391f84771a7662def7
authorWilco Dijkstra <wilco.dijkstra@arm.com>
Wed, 13 Sep 2023 12:21:50 +0000 (13 13:21 +0100)
committerWilco Dijkstra <wilco.dijkstra@arm.com>
Mon, 18 Sep 2023 12:27:44 +0000 (18 13:27 +0100)
tree66a40b6263d5ca9ecc7fc04a9e032f1085bad85d
parent64d5bc35c8c2a66ac133a3e6ace820b0ad8a63fb
AArch64: Improve immediate expansion [PR105928]

Support immediate expansion of immediates which can be created from 2 MOVKs
and a shifted ORR or BIC instruction.  Change aarch64_split_dimode_const_store
to apply if we save one instruction.

This reduces the number of 4-instruction immediates in SPECINT/FP by 5%.

gcc/ChangeLog:
PR target/105928
* config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
Add support for immediates using shifted ORR/BIC.
(aarch64_split_dimode_const_store): Apply if we save one instruction.
* config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
Make pattern global.

gcc/testsuite:
PR target/105928
* gcc.target/aarch64/pr105928.c: Add new test.
* gcc.target/aarch64/vect-cse-codegen.c: Fix test.
gcc/config/aarch64/aarch64.cc
gcc/config/aarch64/aarch64.md
gcc/testsuite/gcc.target/aarch64/pr105928.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/vect-cse-codegen.c