| commit | eec23e8fbe252e8d94522ea99993858a50fa6ca9 | |
| author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Thu, 31 Aug 2017 10:11:41 +0000 (31 10:11 +0000) | ||
| committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Thu, 31 Aug 2017 10:11:41 +0000 (31 10:11 +0000) | ||
| tree | e0f6f0e8697b12bebc8ddd5b704295f42ece7c09 | treesnapshot (tar.gz zip) |
| parent | 5920913469ad2fa85c6bf6a6d69f4bf8d0b3464a | commitdiff |
[AArch64] Tighten address register subreg checks
Previously we allowed subregs of non-GPR modes to be base and index
registers in non-strict mode. In practice such subregs will always
require a reload, so we get better code by disallowing them.
2017-08-31 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow
subregs whose inner modes can be stored in GPRs.
(aarch64_classify_index): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@251557 138bc75d-0d04-0410-961f-82ee72b054a4
Previously we allowed subregs of non-GPR modes to be base and index
registers in non-strict mode. In practice such subregs will always
require a reload, so we get better code by disallowing them.
2017-08-31 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow
subregs whose inner modes can be stored in GPRs.
(aarch64_classify_index): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@251557 138bc75d-0d04-0410-961f-82ee72b054a4
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| gcc/config/aarch64/aarch64.c | diffblobblamehistory |