| commit | e90eddde570b5082a61369b07894971566536d6e | |
| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | |
| Mon, 9 Oct 2023 13:15:30 +0000 (9 21:15 +0800) | ||
| committer | Pan Li <pan2.li@intel.com> | |
| Mon, 9 Oct 2023 14:35:16 +0000 (9 22:35 +0800) | ||
| tree | d207ff805f133256b6367987aa8da469673def56 | treesnapshot (tar.gz zip) |
| parent | 30b76f860a46497592904ed696b9a987769dc775 | commitdiff |
RISC-V Regression tests: Fix FAIL of pr97832* for RVV
These cases are vectorized by vec_load_lanes with strided = 8 instead of SLP
with -fno-vect-cost-model.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/pr97832-2.c: Adapt dump check for target supports load_lanes with stride = 8.
* gcc.dg/vect/pr97832-3.c: Ditto.
* gcc.dg/vect/pr97832-4.c: Ditto.
These cases are vectorized by vec_load_lanes with strided = 8 instead of SLP
with -fno-vect-cost-model.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/pr97832-2.c: Adapt dump check for target supports load_lanes with stride = 8.
* gcc.dg/vect/pr97832-3.c: Ditto.
* gcc.dg/vect/pr97832-4.c: Ditto.
| gcc/testsuite/gcc.dg/vect/pr97832-2.c | diffblobblamehistory | |
| gcc/testsuite/gcc.dg/vect/pr97832-3.c | diffblobblamehistory | |
| gcc/testsuite/gcc.dg/vect/pr97832-4.c | diffblobblamehistory |