| commit | de81c2f2f9499ba85257b597cdfce3f088758d48 | |
| author | Segher Boessenkool <segher@gcc.gnu.org> | |
| Wed, 12 Apr 2017 08:32:56 +0000 (12 10:32 +0200) | ||
| committer | Segher Boessenkool <segher@gcc.gnu.org> | |
| Wed, 12 Apr 2017 08:32:56 +0000 (12 10:32 +0200) | ||
| tree | b2f78a9b3b3c7f9c5cbbdbe3c2ff8e0079932305 | treesnapshot (tar.gz zip) |
| parent | ba6bf284a5a10ba6eba18135c6df05c479aac5ca | commitdiff |
rs6000: Enforce quad_address_p in TImode atomic_load/store (PR80382)
Whatever expand expands to should be valid instructions. The defined
instructions here have a quad_memory_operand predicate, which boils
down to quad_address_p on the address, so let's test for that instead
of only disallowing indexed addresses.
* config/rs6000/sync.md (atomic_load<mode>, atomic_store<mode): Test
for quad_address_p for TImode, instead of just not indexed_address.
From-SVN: r246868
Whatever expand expands to should be valid instructions. The defined
instructions here have a quad_memory_operand predicate, which boils
down to quad_address_p on the address, so let's test for that instead
of only disallowing indexed addresses.
* config/rs6000/sync.md (atomic_load<mode>, atomic_store<mode): Test
for quad_address_p for TImode, instead of just not indexed_address.
From-SVN: r246868
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