rs6000.md (movsi_from_sf): Adjust code to eliminate doing a 32-bit shift right or...
commitd33a4d86f19ea7017216d2363fe045d044d8fdf1
authorMichael Meissner <meissner@linux.vnet.ibm.com>
Tue, 26 Sep 2017 18:04:37 +0000 (26 18:04 +0000)
committerMichael Meissner <meissner@gcc.gnu.org>
Tue, 26 Sep 2017 18:04:37 +0000 (26 18:04 +0000)
treeeb531ad193252720de623a4665158dfa4c4dfe9d
parent8615012c05130f592b4ef6b11ac6af7cc28718d2
rs6000.md (movsi_from_sf): Adjust code to eliminate doing a 32-bit shift right or vector extract after...

2017-09-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.md (movsi_from_sf): Adjust code to
eliminate doing a 32-bit shift right or vector extract after doing
XSCVDPSPN.  Use zero_extendsidi2 instead of p8_mfvsrd_4_disf to
move the value to the GPRs.
(movdi_from_sf_zero_ext): Likewise.
(reload_gpr_from_vsxsf): Likewise.
(p8_mfvsrd_4_disf): Delete, no longer used.

From-SVN: r253209
gcc/ChangeLog
gcc/config/rs6000/rs6000.md