SIMD operations like combine prefer to have their operands in FP registers,
commitd2ad5fae89d0eb32378a01cc5bf3a94454ebcd47
authorwilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 26 May 2016 12:12:20 +0000 (26 12:12 +0000)
committerwilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 26 May 2016 12:12:20 +0000 (26 12:12 +0000)
treef45799067e8c25cc5a7b171d2797792aa21d2ef6
parent5fd1c174c3448e7aa0acc617153b51597ccd8315
SIMD operations like combine prefer to have their operands in FP registers,
so increase the cost of integer registers slightly to avoid unnecessary int<->FP
moves. This improves register allocation of scalar SIMD operations.

        * config/aarch64/aarch64-simd.md (aarch64_combinez):
        Add ? to integer variant.
        (aarch64_combinez_be): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@236770 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/aarch64-simd.md