| commit | c9c2f251f1cb8ebc68c180e3264f2437ade6e16c | |
| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Thu, 18 May 2017 19:34:13 +0000 (18 19:34 +0000) | ||
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Thu, 18 May 2017 19:34:13 +0000 (18 19:34 +0000) | ||
| tree | 3fdb1db7c15c1b1ec369836778fa8f0997dceae2 | treesnapshot (tar.gz zip) |
| parent | 97cb28017e98f63d9b24569590a1768413f3355d | commitdiff |
[gcc]
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/predicates.md (simple_offsettable_mem_operand):
New predicate.
* config/rs6000/rs6000.md (ALTIVEC_DFORM): New iterator.
(define_peephole2 for Altivec d-form load): Add peepholes to catch
cases where the register allocator uses a move and an offsettable
memory operation to/from a FPR register on ISA 2.06/2.07.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: New test.
* gcc.target/powerpc/pr80510-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@248254 138bc75d-0d04-0410-961f-82ee72b054a4
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/predicates.md (simple_offsettable_mem_operand):
New predicate.
* config/rs6000/rs6000.md (ALTIVEC_DFORM): New iterator.
(define_peephole2 for Altivec d-form load): Add peepholes to catch
cases where the register allocator uses a move and an offsettable
memory operation to/from a FPR register on ISA 2.06/2.07.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: New test.
* gcc.target/powerpc/pr80510-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@248254 138bc75d-0d04-0410-961f-82ee72b054a4