| commit | bffa30086e1f24698ab0f9a5f14a2917a8455fab | |
| author | collison <collison@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Fri, 27 Oct 2017 06:05:58 +0000 (27 06:05 +0000) | ||
| committer | collison <collison@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Fri, 27 Oct 2017 06:05:58 +0000 (27 06:05 +0000) | ||
| tree | 8064bf46ae9e6631cad0fde860c06b6f09e943f9 | treesnapshot (tar.gz zip) |
| parent | 808f4b4d253cc2a42dd70944eae9c9ff3fd2085a | commitdiff |
2017-10-26 Michael Collison <michael.collison@arm.com>
* config/aarch64/aarch64.md(<optab>_trunc><vf><GPI:mode>2):
New pattern.
(<optab>_trunchf<GPI:mode>2: New pattern.
(<optab>_trunc<vgp><GPI:mode>2: New pattern.
* config/aarch64/iterators.md (wv): New mode attribute.
(vf, VF): New mode attributes.
(vgp, VGP): New mode attributes.
(s): Update attribute with SImode and DImode prefixes.
* testsuite/gcc.target/aarch64/fix_trunc1.c: New testcase.
* testsuite/gcc.target/aarch64/vect-vcvt.c: Fix scan-assembler
directives to allow float or integer destination registers for
fcvtz[su].
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@254133 138bc75d-0d04-0410-961f-82ee72b054a4
* config/aarch64/aarch64.md(<optab>_trunc><vf><GPI:mode>2):
New pattern.
(<optab>_trunchf<GPI:mode>2: New pattern.
(<optab>_trunc<vgp><GPI:mode>2: New pattern.
* config/aarch64/iterators.md (wv): New mode attribute.
(vf, VF): New mode attributes.
(vgp, VGP): New mode attributes.
(s): Update attribute with SImode and DImode prefixes.
* testsuite/gcc.target/aarch64/fix_trunc1.c: New testcase.
* testsuite/gcc.target/aarch64/vect-vcvt.c: Fix scan-assembler
directives to allow float or integer destination registers for
fcvtz[su].
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@254133 138bc75d-0d04-0410-961f-82ee72b054a4