[AArch64] Fix -mlow-precision-div (PR 86838)

[AArch64] Fix -mlow-precision-div (PR 86838)

The "@" handling broke -mlow-precision-div, because the scalar forms of
the instruction were provided by a pattern that also provided FRECPX
(and so were parameterised on an unspec code as well as a mode),
while the SIMD versions had a dedicated FRECPE pattern.  This patch
moves the scalar FRECPE handling to the SIMD pattern too (as for FRECPS)
and uses a separate pattern for FRECPX.

The convention in aarch64-simd-builtins.def seemed to be to add
comments only if the mapping wasn't obvious (i.e. not just sticking
"aarch64_" on the beginning and "<mode>" on the end), so the patch
deletes the reference to the combined pattern instead of rewording it.

There didn't seem to be any coverage of -mlow-precision-div in the
testsuite, so the patch adds some tests for it.

2018-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR target/86838
	* config/aarch64/iterators.md (FRECP, frecp_suffix): Delete.
	* config/aarch64/aarch64-simd.md
	(aarch64_frecp<FRECP:frecp_suffix><mode>): Fold FRECPE into...
	(@aarch64_frecpe<mode>): ...here and the move FRECPX to...
	(aarch64_frecpx<mode>): ...this new pattern.
	* config/aarch64/aarch64-simd-builtins.def: Remove comment
	about aarch64_frecp<FRECP:frecp_suffix><mode>.

gcc/testsuite/
	PR target/86838
	* gcc.target/aarch64/frecpe_1.c: New test.
	* gcc.target/aarch64/frecpe_2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@263362 138bc75d-0d04-0410-961f-82ee72b054a4