riscv: xtheadbb: Enable constant synthesis with th.srri
commitaf5cb06ec17780736749ed51cfc6dfad9397156c
authorChristoph Müllner <christoph.muellner@vrull.eu>
Tue, 5 Sep 2023 15:30:06 +0000 (5 17:30 +0200)
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>
Tue, 5 Sep 2023 16:12:23 +0000 (5 18:12 +0200)
tree689a0912edd4cc919e003f7545e2bd78ad014979
parentefafa66c294d261a4d964383674ab9ee51feaf88
riscv: xtheadbb: Enable constant synthesis with th.srri

Some constants can be built up using rotate-right instructions.
The code that enables this can be found in riscv_build_integer_1().
However, this functionality is only available for Zbb, which
includes the rori instruction.  This patch enables this also for
XTheadBb, which includes the th.srri instruction.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
synthesis with rotate-right for XTheadBb.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/xtheadbb-li-rotr.c: New test.
gcc/config/riscv/riscv.cc
gcc/testsuite/gcc.target/riscv/xtheadbb-li-rotr.c [new file with mode: 0644]