[gcc]
commita8f33854e5fa85c4849da170dcedb9542e5c3e64
authormeissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 27 Mar 2017 19:19:00 +0000 (27 19:19 +0000)
committermeissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 27 Mar 2017 19:19:00 +0000 (27 19:19 +0000)
treebe558930e8119fcb8d4cd77c87409ffe198eaa01
parent0cdc8a46270f6907fa10c9f591e2408f6cd162b9
[gcc]
2017-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/78543
* config/rs6000/rs6000.md (bswaphi2_extenddi): Combine bswap
HImode and SImode with zero extend to DImode to one insn.
(bswap<mode>2_extenddi): Likewise.
(bswapsi2_extenddi): Likewise.
(bswaphi2_extendsi): Likewise.
(bswaphi2): Combine bswap HImode and SImode into one insn.
Separate memory insns from swapping register.
(bswapsi2): Likewise.
(bswap<mode>2): Likewise.
(bswaphi2_internal): Delete, no longer used.
(bswapsi2_internal): Likewise.
(bswap<mode>2_load): Split bswap HImode/SImode into separate load,
store, and gpr<-gpr swap insns.
(bswap<mode>2_store): Likewise.
(bswaphi2_reg): Register only splitter, combine with the splitter.
(bswaphi2 splitter): Likewise.
(bswapsi2_reg): Likewise.
(bswapsi2 splitter): Likewise.
(bswapdi2): If we have the LDBRX and STDBRX instructions, split
the insns into load, store, and register/register insns.
(bswapdi2_ldbrx): Likewise.
(bswapdi2_load): Likewise.
(bswapdi2_store): Likewise.
(bswapdi2_reg): Likewise.

[gcc/testsuite]
2017-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/78543
* gcc.target/powerpc/pr78543.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@246508 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/rs6000/rs6000.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/pr78543.c [new file with mode: 0644]