PR target/46254
commita56120628ee0de387c7dd271968ff0327045a5a8
authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 27 Aug 2012 21:13:07 +0000 (27 21:13 +0000)
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 27 Aug 2012 21:13:07 +0000 (27 21:13 +0000)
treeb4bfc575aa3d64996935f92d5870b3d297d870c0
parentebbbec4914f1754b7e3a37bfcb95420d07f1ab2a
PR target/46254
* config/i386/predicates.md (cmpxchg8b_pic_memory_operand): Return
true for TARGET_64BIT or !flag_pic.
* config/i386/sync.md (*atomic_compare_and_swap_doubledi_pic): Remove.
(atomic_compare_and_swap_double<mode>): Change operand 2 predicate
to cmpxchg8b_pic_memory_operand.  Use DWIH mode iterator.
Add insn constraint.  Conditionally emit xchg asm insns.
(atomic_compare_and_swap<mode>): Update calls.  Check only
cmpxchg8b_pic_memory_operand in memory address fixup.
(DCASMODE): Remove.
(CASHMODE): Rename from DCASHMODE.
(doublemodesuffix): Update modes.
(regprefix): New mode attribute.

(unspecv) <UNSPECV_CMPXCHG_{1,2,3,4}>: Remove.
<UNSPECV_CMPXCHG>: New constant.
(atomic_compare_and_swap<mode>_1): Rename from
atomic_compare_and_swap_single<mode>.  Update calls and
unspec_volatile constants.
(atomic_compare_and_swap<mode>_doubleword): Rename from
atomic_compare_and_swap_double<mode>.  Update calls and
unspec_volatile constants.

testsuite/ChangeLog:

PR target/46254
* gcc.target/i386/pr46254.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@190732 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/i386/predicates.md
gcc/config/i386/sync.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr46254.c [new file with mode: 0644]