| commit | a3480aacc4ab01651725a63e05829a43bc23d549 | |
| author | Christoph Müllner <christoph.muellner@vrull.eu> | |
| Tue, 25 Apr 2023 13:24:13 +0000 (25 15:24 +0200) | ||
| committer | Kito Cheng <kito.cheng@sifive.com> | |
| Wed, 12 Jul 2023 08:12:27 +0000 (12 16:12 +0800) | ||
| tree | 8387a6975b72d1a5b248e0d1b72c4046429c35d2 | treesnapshot (tar.gz zip) |
| parent | b621883620b127caf20e88e59fa73e666960013e | commitdiff |
riscv: Define Xmode macro
Define a Xmode macro that specifies the registers size (XLEN)
similar to Pmode. This allows the backend code to write generic
RV32/RV64 C code (under certain circumstances).
gcc/ChangeLog:
* config/riscv/riscv.h (Xmode): New macro.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Define a Xmode macro that specifies the registers size (XLEN)
similar to Pmode. This allows the backend code to write generic
RV32/RV64 C code (under certain circumstances).
gcc/ChangeLog:
* config/riscv/riscv.h (Xmode): New macro.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
| gcc/config/riscv/riscv.h | diffblobblamehistory |