| commit | 95590335f20369ad944e6ac02f5ae44c6dd99bbd | |
| author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Tue, 1 Oct 2002 10:14:35 +0000 (1 10:14 +0000) | ||
| committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Tue, 1 Oct 2002 10:14:35 +0000 (1 10:14 +0000) | ||
| tree | f69c789a027f4f0baede901d54b871c4a8488d62 | treesnapshot (tar.gz zip) |
| parent | 903e4a93bbaba4c47265245b701cd260dfa5408e | commitdiff |
* config/mips/mips-protos.h (mips_emit_fcc_reload): Declare.
* config/mips/mips.h (PREDICATE_CODES): Add fcc_register_operand.
* config/mips/mips.c (fcc_register_operand): New function.
(mips_emit_fcc_reload): New function, extracted from reload_incc.
(override_options): Allow TFmode values in float registers
if ISA_HAS_8CC.
* cnfig/mips/mips.md (reload_incc): Change destination prediate
to fcc_register_operand. Remove misleading source constraint.
Use mips_emit_fcc_reload.
(reload_outcc): Duplicate reload_incc.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@57683 138bc75d-0d04-0410-961f-82ee72b054a4
* config/mips/mips.h (PREDICATE_CODES): Add fcc_register_operand.
* config/mips/mips.c (fcc_register_operand): New function.
(mips_emit_fcc_reload): New function, extracted from reload_incc.
(override_options): Allow TFmode values in float registers
if ISA_HAS_8CC.
* cnfig/mips/mips.md (reload_incc): Change destination prediate
to fcc_register_operand. Remove misleading source constraint.
Use mips_emit_fcc_reload.
(reload_outcc): Duplicate reload_incc.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@57683 138bc75d-0d04-0410-961f-82ee72b054a4