| commit | 8f6c4036ec93852f3e308cb54d4a560e2da06dbf | |
| author | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Sun, 24 Sep 2017 21:37:09 +0000 (24 21:37 +0000) | ||
| committer | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Sun, 24 Sep 2017 21:37:09 +0000 (24 21:37 +0000) | ||
| tree | 76217d8b67ea08f88b76beb8c62b38c2d7d8f795 | treesnapshot (tar.gz zip) |
| parent | 91ce1cab3eeb3b846f76b778f6be014197470978 | commitdiff |
x32: Encode %esp as %rsp to avoid 0x67 prefix
Since the upper 32 bits of stack register are always zero for x32, we
can encode %esp as %rsp to avoid 0x67 prefix in address if there is no
index or base register.
gcc/
PR target/82267
* config/i386/i386.c (ix86_print_operand_address_as): Encode
%esp as %rsp to avoid 0x67 prefix if there is no index or base
register.
gcc/testsuite/
PR target/82267
* gcc.target/i386/pr82267.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@253127 138bc75d-0d04-0410-961f-82ee72b054a4
Since the upper 32 bits of stack register are always zero for x32, we
can encode %esp as %rsp to avoid 0x67 prefix in address if there is no
index or base register.
gcc/
PR target/82267
* config/i386/i386.c (ix86_print_operand_address_as): Encode
%esp as %rsp to avoid 0x67 prefix if there is no index or base
register.
gcc/testsuite/
PR target/82267
* gcc.target/i386/pr82267.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@253127 138bc75d-0d04-0410-961f-82ee72b054a4
| gcc/ChangeLog | diffblobblamehistory | |
| gcc/config/i386/i386.c | diffblobblamehistory | |
| gcc/testsuite/ChangeLog | diffblobblamehistory | |
| gcc/testsuite/gcc.target/i386/pr82267.c | [new file with mode: 0644] | blob |