(addsi3, subsi3, andsi3, iorsi3, ashlsi3, ashrsi3, lshrsi3, rotrsi3):

(addsi3, subsi3, andsi3, iorsi3, ashlsi3, ashrsi3, lshrsi3, rotrsi3):
Rewrite as expand patterns.
(rotlsi3): New expand.
(matchers, and split patterns for above): New.
(all patterns with shifts): Let arm_print_operand output the ", " before a
shift if it is needed.
(zero_extendqihi2): Delete.
(zero_extendqisi2): Expand to (and ...) if not memory.
(movsi): Call arm_split_constant to generate a constant.
(movqi): Only force a MEM into a register if not reloading.
(movsf, movdf): If loading a non-immediate floating point value, or loading
and floating point immediate into integer regs, push the constant straight
into the pool.
(movdf): Get rid of the scratch register.
(reload_outdf): Rewrite to expand to the two required insns.
(matcher for movdf): Remove alternative that used scratch register for
storing.
(movxf): rewrite as expand.
(matcher for movxf): Recognize even when XFmode code is disabled, so that
prologue insns can be generated.
(Matcher for reversed conditional jump): Don't match if the mode of the
CC register is not reversible.
(prologue): New expand.
(matcher for multi_register_push insn): New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@7533 138bc75d-0d04-0410-961f-82ee72b054a4