* config/i386/sse.md (avx512f_load<mode>_mask): Emit vmovup{s,d}
commit8688c545f63b6950c7be4a3a65144177e521b305
authorjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Sat, 4 Jan 2014 09:57:36 +0000 (4 09:57 +0000)
committerjakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4>
Sat, 4 Jan 2014 09:57:36 +0000 (4 09:57 +0000)
tree0825b32b591ed13bbe28597519cb1b2c610c122a
parentbd8f578b142037be0d8f60af0aea72e898ee7f73
* config/i386/sse.md (avx512f_load<mode>_mask): Emit vmovup{s,d}
or vmovdqu* for misaligned_operand.
(<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
<sse2_avx_avx512f>_loaddqu<mode><mask_name>): Handle <mask_applied>.
* config/i386/i386.c (ix86_expand_special_args_builtin): Set
aligned_mem for AVX512F masked aligned load and store builtins and for
non-temporal moves.

* gcc.target/i386/avx512f-vmovdqu32-1.c: Allow vmovdqu64 instead of
vmovdqu32.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206332 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/i386/i386.c
gcc/config/i386/sse.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/avx512f-vmovdqu32-1.c