* config/i386/sse.md (avx512f_load<mode>_mask): Emit vmovup{s,d}
or vmovdqu* for misaligned_operand.
(<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
<sse2_avx_avx512f>_loaddqu<mode><mask_name>): Handle <mask_applied>.
* config/i386/i386.c (ix86_expand_special_args_builtin): Set
aligned_mem for AVX512F masked aligned load and store builtins and for
non-temporal moves.
* gcc.target/i386/avx512f-vmovdqu32-1.c: Allow vmovdqu64 instead of
vmovdqu32.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206332 138bc75d-0d04-0410-961f-82ee72b054a4