RISC-V: Refine LMUL computation for MASK_LEN_LOAD/MASK_LEN_STORE IFN
commit83869ff4bcd694634fca969993af4c0dbc51e2bb
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Thu, 4 Jan 2024 06:52:33 +0000 (4 14:52 +0800)
committerPan Li <pan2.li@intel.com>
Thu, 4 Jan 2024 07:13:06 +0000 (4 15:13 +0800)
tree8354a84af30084e51183274338e1523b4990ae7d
parent49b2387b7d746d23b791f4daeb755bf1e35abe3e
RISC-V: Refine LMUL computation for MASK_LEN_LOAD/MASK_LEN_STORE IFN

Notice a case has "Maximum lmul = 16" which is incorrect.
Correct LMUL estimation for MASK_LEN_LOAD/MASK_LEN_STORE.

Committed.

gcc/ChangeLog:

* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): New function.
(compute_nregs_for_mode): Refine LMUL.
(max_number_of_live_regs): Ditto.
(compute_estimated_lmul): Ditto.
(has_unexpected_spills_p): Ditto.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c: New test.
gcc/config/riscv/riscv-vector-costs.cc
gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c [new file with mode: 0644]