RISC-V: Fix typo in test abi configuration
commit806789e6daa39ab0503d91c71b3faeb5d5cdd317
authorPan Li <pan2.li@intel.com>
Sun, 3 Dec 2023 14:13:00 +0000 (3 22:13 +0800)
committerPan Li <pan2.li@intel.com>
Sun, 3 Dec 2023 14:17:30 +0000 (3 22:17 +0800)
treef13c3e001e966461274d2ebc4ea6eb162ad5e792
parentf37744662cbc74efcceb790b99dcd6521c51a578
RISC-V: Fix typo in test abi configuration

It should be -mabi=lp64d instead of -mabi=lp64, committed in as obvious.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr112743-1.c: Fix typo.
* gcc.target/riscv/rvv/base/pr112743-2.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/base/pr112743-1.c
gcc/testsuite/gcc.target/riscv/rvv/base/pr112743-2.c