* config/mips/mips.h (ISA_HAS_EXTS): New macro.
* config/mips/mips.md (*ashr_trunc<mode>): Name the pattern
combining an arithmetic right shift by more than 31 and a
trunction. Don't match for out-of-range shift amounts. Set
attribute mode to <MODE>.
(*lshr32_trunc<mode>): Name the pattern combining a logical right
shift by 32 and and a truncation. Set attribute mode to <MODE>.
(*<optab>_trunc<mode>_exts): New pattern for truncated right
shifts by less than 32.
(extv): Change predicate on first operand to accept registers.
Change predicate of the other operands from immediate_operand to
const_int_operand. Expand exts when source is a register.
(extzv): Change predicate of the constant operands from
immediate_operand to const_int_operand.
(extzv<mode>): Change predicate of the constant operands from
immediate_operand to const_int_operand and no constraint. Also
remove mode.
(*extzv_trunc<mode>_exts): New pattern.
testsuite/
* gcc.target/mips/truncate-2.c: New test.
* gcc.target/mips/octeon-exts-1.c: New test.
* gcc.target/mips/octeon-exts-2.c: New test.
* gcc.target/mips/octeon-exts-3.c: New test.
* gcc.target/mips/octeon-exts-4.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@140009 138bc75d-0d04-0410-961f-82ee72b054a4