re PR target/71720 (initialization of a vector of floats generates incorrect code...
commit70c119669e75536e1ef8fa197838ed54fc356c69
authorMichael Meissner <meissner@linux.vnet.ibm.com>
Fri, 1 Jul 2016 18:23:29 +0000 (1 18:23 +0000)
committerMichael Meissner <meissner@gcc.gnu.org>
Fri, 1 Jul 2016 18:23:29 +0000 (1 18:23 +0000)
tree61acca698a8064ffd961a7c6b8a1aba22cc11c61
parenta8dbab92f0f397bd4b5f5a8d4fc08823006151be
re PR target/71720 (initialization of a vector of floats generates incorrect code for -mcpu=power9)

[gcc]
2016-07-01  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/71720
* config/rs6000/vsx.md (vsx_splat_v4sf_internal): When splitting
the insns, use vsx_xxspltw_v4sf_direct which does not check for
little endian.

[gcc/testsuite]
2016-07-01  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/71720
* gcc.target/powerpc/pr71720.c: New test.

From-SVN: r237920
gcc/ChangeLog
gcc/config/rs6000/vsx.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/pr71720.c [new file with mode: 0644]