RISC-V: Support segment intrinsics

RISC-V: Support segment intrinsics

Add segment load/store intrinsics:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/198

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
	New function.
	(class vlseg): New class.
	(class vsseg): Ditto.
	(class vlsseg): Ditto.
	(class vssseg): Ditto.
	(class seg_indexed_load): Ditto.
	(class seg_indexed_store): Ditto.
	(class vlsegff): Ditto.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (vlseg):
	Ditto.
	(vsseg): Ditto.
	(vlsseg): Ditto.
	(vssseg): Ditto.
	(vluxseg): Ditto.
	(vloxseg): Ditto.
	(vsuxseg): Ditto.
	(vsoxseg): Ditto.
	(vlsegff): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct
	seg_loadstore_def): Ditto.
	(struct seg_indexed_loadstore_def): Ditto.
	(struct seg_fault_load_def): Ditto.
	(SHAPE): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins.cc
	(function_builder::append_nf): New function.
	* config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
	Change ptr from double into float.
	(vfloat32m1x3_t): Ditto.
	(vfloat32m1x4_t): Ditto.
	(vfloat32m1x5_t): Ditto.
	(vfloat32m1x6_t): Ditto.
	(vfloat32m1x7_t): Ditto.
	(vfloat32m1x8_t): Ditto.
	(vfloat32m2x2_t): Ditto.
	(vfloat32m2x3_t): Ditto.
	(vfloat32m2x4_t): Ditto.
	(vfloat32m4x2_t): Ditto.
	* config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
	* config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
	segment ff load.
	* config/riscv/riscv.md: Add segment instructions.
	* config/riscv/vector-iterators.md: Support segment intrinsics.
	* config/riscv/vector.md (@pred_unit_strided_load<mode>): New
	pattern.
	(@pred_unit_strided_store<mode>): Ditto.
	(@pred_strided_load<mode>): Ditto.
	(@pred_strided_store<mode>): Ditto.
	(@pred_fault_load<mode>): Ditto.
	(@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
	(@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
	(@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
	(@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
	(@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
	(@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
	(@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
	(@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
	(@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
	(@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
	(@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
	(@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
	(@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
	(@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.

Signed-off-by: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>