[AArch64] PR target/85512: Tighten SIMD right shift immediate constraints pt2
commit5d7309c867ac24e09f73ba6ae7df40a86b31d2e2
authorktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 27 Apr 2018 08:48:49 +0000 (27 08:48 +0000)
committerktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 27 Apr 2018 08:48:49 +0000 (27 08:48 +0000)
treeede70c94da25f6b302c75cfc025ea1c1f28ba511
parent89cc6dc510fad8b9abc94920d1acbe080df9f248
[AArch64] PR target/85512: Tighten SIMD right shift immediate constraints pt2

PR target/85512
* config/aarch64/constraints.md (Usg): Limit to 31.
(Usj): Limit to 63.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@259699 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/constraints.md