| commit | 5bfc8303ffe2d86e938d45f13cd99a39469dac4f | |
| author | Wilco Dijkstra <wdijkstr@arm.com> | |
| Wed, 12 Feb 2020 18:23:21 +0000 (12 18:23 +0000) | ||
| committer | Wilco Dijkstra <wdijkstr@arm.com> | |
| Wed, 12 Feb 2020 18:23:21 +0000 (12 18:23 +0000) | ||
| tree | 6b2032e18a9ea0f2a430b61e0f7fe5817e7ef7fb | treesnapshot (tar.gz zip) |
| parent | 9921bbf9b2e27568d952fe6ee5bc083c93bbf7fd | commitdiff |
[AArch64] Set ctz rtx_cost (PR93565)
Combine sometimes behaves oddly and duplicates ctz to remove an unnecessary
sign extension. Avoid this by setting the cost for ctz to be higher than
that of a simple ALU instruction. Deepsjeng performance improves by ~0.6%.
gcc/
PR rtl-optimization/93565
* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
testsuite/
PR rtl-optimization/93565
* gcc.target/aarch64/pr93565.c: New test.
Combine sometimes behaves oddly and duplicates ctz to remove an unnecessary
sign extension. Avoid this by setting the cost for ctz to be higher than
that of a simple ALU instruction. Deepsjeng performance improves by ~0.6%.
gcc/
PR rtl-optimization/93565
* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
testsuite/
PR rtl-optimization/93565
* gcc.target/aarch64/pr93565.c: New test.