| commit | 586a8300a78da4b6b74b2bc46b0334424fe18765 | |
| author | alalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Mon, 24 Nov 2014 15:23:28 +0000 (24 15:23 +0000) | ||
| committer | alalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Mon, 24 Nov 2014 15:23:28 +0000 (24 15:23 +0000) | ||
| tree | ad9130dd31daa673cdc7feb9dc3758de07041c8b | treesnapshot (tar.gz zip) |
| parent | 13b3a7b9ae2be1e095fcecc442ab8adbafd5ec25 | commitdiff |
[AArch64]Add vec_shr pattern for 64-bit vectors using ush{l,r}; enable tests.
gcc/:
* config/aarch64/aarch64-simd.md (vec_shr<mode>): New.
gcc/testsuite/:
* lib/target-supports.exp (check_effective_target_whole_vector_shift):
Add aarch64{,_be}.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218022 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/:
* config/aarch64/aarch64-simd.md (vec_shr<mode>): New.
gcc/testsuite/:
* lib/target-supports.exp (check_effective_target_whole_vector_shift):
Add aarch64{,_be}.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218022 138bc75d-0d04-0410-961f-82ee72b054a4
| gcc/ChangeLog | diffblobblamehistory | |
| gcc/config/aarch64/aarch64-simd.md | diffblobblamehistory | |
| gcc/testsuite/ChangeLog | diffblobblamehistory | |
| gcc/testsuite/lib/target-supports.exp | diffblobblamehistory |