gcc/ChangeLog:
commit55f6c1d8f7bfebd4543c02ec6b132995dfa0df50
authorcarll <carll@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 16 May 2018 17:21:04 +0000 (16 17:21 +0000)
committercarll <carll@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 16 May 2018 17:21:04 +0000 (16 17:21 +0000)
tree08b23e9ecb41f589ccab68f94f4a82383d79009b
parentb0f2cc40dd30a66ee803f11c324e8546c1e035e5
gcc/ChangeLog:

2018-05-16  Carl Love  <cel@us.ibm.com>

* config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions
dcbt and dcbtstt with TH=16 if operands[2] is 0 and Power 8 or newer.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260296 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/rs6000/rs6000.md