| commit | 52d68db052a5004860f4bc3527739f043ee94b31 | |
| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Fri, 23 Jun 2017 18:25:10 +0000 (23 18:25 +0000) | ||
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Fri, 23 Jun 2017 18:25:10 +0000 (23 18:25 +0000) | ||
| tree | b9083af0fb1d5b5136518063b3cb24bc25110a57 | treesnapshot (tar.gz zip) |
| parent | a360bad748ce873947180b82e7f46ec4d330fc2b | commitdiff |
[gcc]
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in
32-bit, since indexed is not valid for DImode.
(mov<mode>_hardfloat32): Reorder ISA 2.07 load/stores before ISA
3.0 d-form load/stores to be the same as mov<mode>_hardfloat64.
(define_peephole2 for Altivec d-form load): Add 32-bit support.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Allow test to run on 32-bit.
* gcc.target/powerpc/pr80510-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@249607 138bc75d-0d04-0410-961f-82ee72b054a4
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in
32-bit, since indexed is not valid for DImode.
(mov<mode>_hardfloat32): Reorder ISA 2.07 load/stores before ISA
3.0 d-form load/stores to be the same as mov<mode>_hardfloat64.
(define_peephole2 for Altivec d-form load): Add 32-bit support.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Allow test to run on 32-bit.
* gcc.target/powerpc/pr80510-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@249607 138bc75d-0d04-0410-961f-82ee72b054a4