| commit | 518fea64fca4b49cabadda582dbbb5365aa2fb3d | |
| author | Michael Meissner <meissner@linux.vnet.ibm.com> | |
| Sun, 16 Feb 2014 03:08:03 +0000 (16 03:08 +0000) | ||
| committer | Michael Meissner <meissner@gcc.gnu.org> | |
| Sun, 16 Feb 2014 03:08:03 +0000 (16 03:08 +0000) | ||
| tree | 5a7b025b5dbad02e3ef46e1cc6e43dbe2ac61941 | treesnapshot (tar.gz zip) |
| parent | 71a03f516f23aa321536f957feb6e0676f885b67 | commitdiff |
re PR target/60203 (Support long double/_Decimal128 direct move on power8)
[gcc]
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints.
(mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves
into 64-bit and 32-bit moves. On 64-bit moves, add support for
using direct move instructions on ISA 2.07. Also adjust
instruction length for 64-bit.
(mov<mode>_64bit, TFmode/TDmode): Likewise.
(mov<mode>_32bit, TFmode/TDmode): Likewise.
[gcc/testsuite]
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* gcc.target/powerpc/pr60203.c: New testsuite.
From-SVN: r207808
[gcc]
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints.
(mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves
into 64-bit and 32-bit moves. On 64-bit moves, add support for
using direct move instructions on ISA 2.07. Also adjust
instruction length for 64-bit.
(mov<mode>_64bit, TFmode/TDmode): Likewise.
(mov<mode>_32bit, TFmode/TDmode): Likewise.
[gcc/testsuite]
2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60203
* gcc.target/powerpc/pr60203.c: New testsuite.
From-SVN: r207808