RISC-V: Remove redundant vec_duplicate pattern
commit4260f4af4dde6dbf85c28da7e8aaf03985b3d171
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Mon, 18 Sep 2023 12:35:08 +0000 (18 20:35 +0800)
committerLehua Ding <lehua.ding@rivai.ai>
Mon, 18 Sep 2023 12:58:31 +0000 (18 20:58 +0800)
tree4172f6aa7f789d0181e99414ce6af65c8c798e56
parentbdb7d85dde56b69af378adcffe45accf792cf4fd
RISC-V: Remove redundant vec_duplicate pattern

Currently, VLS and VLA patterns are different.
VLA is define_expand
VLS is define_insn_and_split

It makes no sense that they are different pattern format.
Merge them into same pattern (define_insn_and_split).
It can also be helpful for the future vv -> vx fwprop optimization.

gcc/ChangeLog:

* config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
* config/riscv/vector.md (@vec_duplicate<mode>): Remove.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/pr111313.c: Adapt test.
gcc/config/riscv/riscv-selftests.cc
gcc/config/riscv/vector.md
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111313.c