PR target/97250: i386: Add support for x86-64-v2, x86-64-v3, x86-64-v4 levels for...

PR target/97250: i386: Add support for x86-64-v2, x86-64-v3, x86-64-v4 levels for x86-64

These micro-architecture levels are defined in the x86-64 psABI:

https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9

PTA_NO_TUNE is introduced so that the new processor alias table entries
do not affect the CPU tuning setting in ix86_tune.

The tests depend on the macros added in commit 92e652d8c21bd7e66cbb0f900
("i386: Define __LAHF_SAHF__ and __MOVBE__ macros, based on ISA flags").

gcc/:
	PR target/97250
	* config/i386/i386.h (PTA_NO_TUNE, PTA_X86_64_BASELINE)
	(PTA_X86_64_V2, PTA_X86_64_V3, PTA_X86_64_V4): New.
	* common/config/i386/i386-common.c (processor_alias_table):
	Add "x86-64-v2", "x86-64-v3", "x86-64-v4".
	* config/i386/i386-options.c (ix86_option_override_internal):
	Handle new PTA_NO_TUNE processor table entries.
	* doc/invoke.texi (x86 Options): Document new -march values.

gcc/testsuite/:
	PR target/97250
	* gcc.target/i386/x86-64-v2.c: New test.
	* gcc.target/i386/x86-64-v3.c: New test.
	* gcc.target/i386/x86-64-v3-haswell.c: New test.
	* gcc.target/i386/x86-64-v3-skylake.c: New test.
	* gcc.target/i386/x86-64-v4.c: New test.