[AArch64] Fix register clobber in, aarch64_ashr_sisd_or_int_<mode>3 split.
commit2f49a7a00437bd380e305cd518611422ce03af9c
authormshawcroft <mshawcroft@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 30 Jun 2014 07:54:59 +0000 (30 07:54 +0000)
committermshawcroft <mshawcroft@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 30 Jun 2014 07:54:59 +0000 (30 07:54 +0000)
tree7fa66772c1b413d0a1c56cfa5ab2674e9a947586
parent1235e04882cca45a611e99134b613df66684cf25
[AArch64] Fix register clobber in, aarch64_ashr_sisd_or_int_<mode>3 split.

PR target/61633

The two split patterns associated with
aarch64_ashr_sisd_or_int_<mode>3 split the instruction into a NEG
followed by an SHL.  The split uses one of the input operands as a
scratch register to hold the output of the NEG resulting in register
corruption.

This patch adjusts the splits to use the output operand as the scratch
register.

2014-06-30  Marcus Shawcroft  <marcus.shawcroft@arm.com>

       PR target/61633
       * config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3):
       Add alternative; make early clobber.  Adjust both split patterns
       to use operand 0 as the working register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212137 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/aarch64.md