| commit | 27ab9d29c87a8ba3d55c0d32b7fad0dc2efb117a | |
| author | wilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Mon, 14 Nov 2016 12:07:03 +0000 (14 12:07 +0000) | ||
| committer | wilco <wilco@138bc75d-0d04-0410-961f-82ee72b054a4> | |
| Mon, 14 Nov 2016 12:07:03 +0000 (14 12:07 +0000) | ||
| tree | 98019cdbfc5bf0bc0b95561471186e3aee3edc48 | treesnapshot (tar.gz zip) |
| parent | 95c854ad4590784bf31bca7871522f59330e773c | commitdiff |
The second patch updates the Cortex-A57 scheduler now that we can differentiate
between shifts and bitfield inserts. The Cortex-A57 Software Optimization Guide
indicates that BFM operations use the integer multi-cycle pipeline, while ARM
UXTB/H instructions use the Integer 1 or Integer 0 pipelines, so swap the bfm
and extend reservations. This results in minor scheduling differences.
* config/arm/cortex-a57.md (cortex_a57_alu): Move extend here, bfm...
(cortex_a57_alu_shift): ...here.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@242385 138bc75d-0d04-0410-961f-82ee72b054a4
between shifts and bitfield inserts. The Cortex-A57 Software Optimization Guide
indicates that BFM operations use the integer multi-cycle pipeline, while ARM
UXTB/H instructions use the Integer 1 or Integer 0 pipelines, so swap the bfm
and extend reservations. This results in minor scheduling differences.
* config/arm/cortex-a57.md (cortex_a57_alu): Move extend here, bfm...
(cortex_a57_alu_shift): ...here.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@242385 138bc75d-0d04-0410-961f-82ee72b054a4
| gcc/ChangeLog | diffblobblamehistory | |
| gcc/config/arm/cortex-a57.md | diffblobblamehistory |