RISC-V: Change sp subtracts so prologue stores can compress.
commit26fbe883ee82c31d7651ecb539d0f92c5487c450
authorwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 15 Feb 2018 01:14:23 +0000 (15 01:14 +0000)
committerwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 15 Feb 2018 01:14:23 +0000 (15 01:14 +0000)
treeb5e6fe7f7bfd30e38823a79d94d8b8b50f921d6c
parentbc37679f1e7b2a24bcb191cd84baf5efaad14625
RISC-V: Change sp subtracts so prologue stores can compress.

gcc/
* config/riscv/riscv.c (riscv_first_stack_step): Move locals after
first SMALL_OPERAND check.  New local min_second_step.  Move assert
to where locals are set.  Add TARGET_RVC support.
* config/riscv/riscv.h (C_SxSP_BITS, SWSP_REACH, SDSP_REACH): New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@257681 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/riscv/riscv.c
gcc/config/riscv/riscv.h