[aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.
commit22c75b4ed94bd731cb6e37c507de1d91954a17cf
authorPrathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
Thu, 19 Jan 2023 07:13:55 +0000 (19 12:43 +0530)
committerPrathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
Thu, 19 Jan 2023 07:16:08 +0000 (19 12:46 +0530)
treefaad56f2ff8c529707f7976abaafaf2723ed1153
parent3c99493bf39a7fef9213e6f5af94b78bb15fcfdc
[aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns.

gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
the pattern.
(aarch64_simd_vec_copy_lane<mode>): Likewise.
(aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
gcc/config/aarch64/aarch64-simd.md