RISC-V: Refine frm emit after bb end in succ edges
commit177ca16b615d285f419cf2ab0337bc01f7be09db
authorPan Li <pan2.li@intel.com>
Thu, 9 Nov 2023 06:42:04 +0000 (9 14:42 +0800)
committerPan Li <pan2.li@intel.com>
Thu, 9 Nov 2023 12:33:34 +0000 (9 20:33 +0800)
treeb6d8e08ceebbb7a4931b51f758b2afd66bd5ae05
parent83f66d90af69837f7c8fc88f8afb7074d4555394
RISC-V: Refine frm emit after bb end in succ edges

This patch would like to fine the frm insn emit when we
meet abnormal edge in the loop. Conceptually, we only need
to emit once when abnormal instead of every iteration in
the loop.

This patch would like to fix this defect and only perform
insert_insn_end_basic_block when at least one succ edge is
abnormal.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
perform once emit when at least one succ edge is abnormal.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/config/riscv/riscv.cc