re PR testsuite/60672 (FAIL: g++.dg/cpp1y/auto-fn25.C -std=gnu++1y (test for errors...
commit117f16fbba31ecc4202d734d3ad7c618143c4a40
authorMichael Meissner <meissner@linux.vnet.ibm.com>
Thu, 27 Mar 2014 20:07:16 +0000 (27 20:07 +0000)
committerMichael Meissner <meissner@gcc.gnu.org>
Thu, 27 Mar 2014 20:07:16 +0000 (27 20:07 +0000)
treecbc1b2cc94ac1e09bf62fb232d9527d97d0c4864
parent9e038952c553edf5aed95342eec677b2ddb69c38
re PR testsuite/60672 (FAIL: g++.dg/cpp1y/auto-fn25.C -std=gnu++1y  (test for errors, line 7))

[gcc]
2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/constraints.md (wD constraint): New constraint to
match the constant integer to get the top DImode/DFmode out of a
vector in a VSX register.

* config/rs6000/predicates.md (vsx_scalar_64bit): New predicate to
match the constant integer to get the top DImode/DFmode out of a
vector in a VSX register.

* config/rs6000/rs6000-builtins.def (VBPERMQ): Add vbpermq builtin
for ISA 2.07.

* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
vbpermq builtins.

* config/rs6000/rs6000.c (rs6000_debug_reg_global): If
-mdebug=reg, print value of VECTOR_ELEMENT_SCALAR_64BIT.

* config/rs6000/vsx.md (vsx_extract_<mode>, V2DI/V2DF modes):
Optimize vec_extract of 64-bit values, where the value being
extracted is in the top word, where we can use scalar
instructions.  Add direct move and store support.  Combine the big
endian/little endian vector select load support into a single
insn.
(vsx_extract_<mode>_internal1): Likewise.
(vsx_extract_<mode>_internal2): Likewise.
(vsx_extract_<mode>_load): Likewise.
(vsx_extract_<mode>_store): Likewise.
(vsx_extract_<mode>_zero): Delete, big and little endian insns are
combined into vsx_extract_<mode>_load.
(vsx_extract_<mode>_one_le): Likewise.

* config/rs6000/rs6000.h (VECTOR_ELEMENT_SCALAR_64BIT): Macro to
define the top 64-bit vector element.

* doc/md.texi (PowerPC and IBM RS6000 constraints): Document wD
constraint.

PR target/60672
* config/rs6000/altivec.h (vec_xxsldwi): Add missing define to
enable use of xxsldwi and xxpermdi builtin functions.
(vec_xxpermdi): Likewise.

* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
Document use of vec_xxsldwi and vec_xxpermdi builtins.

[gcc/testsuite]
2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/p8vector-vbpermq.c: New test to test the
vbpermq builtin.

* gcc.target/powerpc/vsx-extract-1.c: New test to test VSX
vec_select optimizations.
* gcc.target/powerpc/vsx-extract-2.c: Likewise.
* gcc.target/powerpc/vsx-extract-3.c: Likewise.

PR target/60672
* gcc.target/powerpc/pr60676.c: New file, make sure xxsldwi and
xxpermdi builtins are supported.

From-SVN: r208877
18 files changed:
gcc/ChangeLog
gcc/config/rs6000/altivec.h
gcc/config/rs6000/altivec.md
gcc/config/rs6000/constraints.md
gcc/config/rs6000/predicates.md
gcc/config/rs6000/rs6000-builtin.def
gcc/config/rs6000/rs6000-c.c
gcc/config/rs6000/rs6000.c
gcc/config/rs6000/rs6000.h
gcc/config/rs6000/vsx.md
gcc/doc/extend.texi
gcc/doc/md.texi
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/pr60676.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c [new file with mode: 0644]