riscv: Synthesize all 11-bit-rotate constants with rori
commit102dd3e8067f12beee1b8b0bec6848733d107aee
authorChristoph Müllner <christoph.muellner@vrull.eu>
Tue, 5 Sep 2023 20:00:00 +0000 (5 22:00 +0200)
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>
Tue, 5 Sep 2023 21:58:31 +0000 (5 23:58 +0200)
tree426c8d77879b2093fa614343b2f37ea27dacb50c
parentfbc01748ba46eb26074388a8fb7b44d25a414a72
riscv: Synthesize all 11-bit-rotate constants with rori

Some constants can be built up using LI+RORI instructions.
The current implementation requires one of the upper 32-bits
to be a zero bit, which is not neccesary.
Let's drop this requirement in order to be able to synthesize
a constant like 0xffffffff00ffffffL.

The tests for LI+RORI are made more strict to detect regression
in the calculation of the LI constant and the rotation amount.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_build_integer_1): Don't
require one zero bit in the upper 32 bits for LI+RORI synthesis.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/xtheadbb-li-rotr.c: New tests.
* gcc.target/riscv/zbb-li-rotr.c: Likewise.
gcc/config/riscv/riscv.cc
gcc/testsuite/gcc.target/riscv/xtheadbb-li-rotr.c
gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c