| commit | 09c9de06074ced7a4beb148bcf9611a5c5fb0d61 | |
| author | Pan Li <pan2.li@intel.com> | |
| Mon, 23 Oct 2023 09:53:20 +0000 (23 17:53 +0800) | ||
| committer | Pan Li <pan2.li@intel.com> | |
| Mon, 23 Oct 2023 09:58:02 +0000 (23 17:58 +0800) | ||
| tree | 7da419535f0a1e2b33074cd7f2de3a0cb7797c63 | treesnapshot (tar.gz zip) |
| parent | 0093821426cc22dbe40d46eb763dfc9cf58f8cb1 | commitdiff |
RISC-V: Remove unnecessary asm check for vec cvt
The vsetvl asm check is unnecessary for the vector convert. We
should be focus for constrait and leave the vsetvl test to the
vsetvl pass.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Remove the vsetvl
asm check from func body.
* gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
The vsetvl asm check is unnecessary for the vector convert. We
should be focus for constrait and leave the vsetvl test to the
vsetvl pass.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Remove the vsetvl
asm check from func body.
* gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
| gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-0.c | diffblobblamehistory | |
| gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/cvt-1.c | diffblobblamehistory |